Commit Graph

91 Commits

Author SHA1 Message Date
Hakan Bastedt
7bff3f3789 linuxcnc stepgen is now in StepGen3. Compiles 2024-03-22 17:31:21 +01:00
Hakan Bastedt
23fe81afbe Factored Stepgen2, StepGen3 is a copy of Stepgen2 2024-03-21 16:45:59 +01:00
Hakan Bastedt
fa34d81e41 Factored Stepgen2, StepGen3 is a copy of Stepgen2 2024-03-21 16:45:46 +01:00
Hakan Bastedt
30a9f10c7b Well it works, network-wise. But there are those extra peaks that have been since the start. Let's see if I can remove them. Welcome StepGen3 2024-03-21 16:28:55 +01:00
Hakan Bastedt
8f26a10224 It works. I hate RealTek. Even with the r8618_dkms driver it doesn't work. I bought a Intel network card, set irq coalesce rx-usecs and tx-usecs to 0. Now it works works WORKS. No lost packages, no delayed packages. I hate RealTek 2024-03-20 17:06:24 +01:00
Hakan Bastedt
d4fed6cfe8 Yes it works now. Made another implementation of the pulse IRQ and all that. We'll see if I keep this or go back to the older. It is IMPORTANT, REQUIRED to use a 4.9 linux kernel for it to work. There are obviously bugs in the RealTek network drivers R8168/R8169 in 5+ kernels. All this work could have been avoided with a 4.9 kernel. 2024-03-17 22:04:52 +01:00
Hakan Bastedt
27475eaecd Seems to actually work, but I have seen that before, so testing time 2024-03-14 10:15:23 +01:00
Hakan Bastedt
71ae242fc4 Fixed bug in extend32to64:extendTime() 2024-03-13 23:33:25 +01:00
Hakan Bastedt
f341eb5074 wip 2024-03-10 22:40:25 +01:00
Hakan Bastedt
fef934b103 wip 2024-03-10 01:03:50 +01:00
Hakan Bastedt
31be067dea After test in lathe. Basically ok, always use real Tstartf, not 1/n 2024-03-08 09:00:55 +01:00
Hakan Bastedt
94d68adbb1 Added Z stepgen. Both X and Z works on the scope 2024-03-03 19:01:02 +01:00
Hakan Bastedt
e8ef618fcc Test in lathe coming. 2024-03-03 17:02:04 +01:00
Hakan Bastedt
30dc44d5e6 Direction output to dirPin. 2024-02-16 11:45:06 +01:00
Hakan Bastedt
2b2be4f63d Going for test in the lathe 2024-02-13 10:49:57 +01:00
Hakan Bastedt
cbae816bd9 More debug variables 2024-02-13 10:49:36 +01:00
Hakan Bastedt
c0d2bfcf62 doc update on stepgen problem and solution 2024-02-12 18:37:16 +01:00
Hakan Bastedt
f4a15afa8a a cycle's pwm train maight have been too long and run into the start of next cycle's pwm train. That's gone now and it seems to work.
A more brilliant solution is needed for this.
2024-02-11 19:56:16 +01:00
Hakan Bastedt
c04ac0e74b Consistently get SM2 event now. Must check directly in irq. DIG_PROCESS modified to check this ALevent copy 2024-02-09 22:58:28 +01:00
Hakan Bastedt
6d18c2cb3f Clear ALevents for DC_sync0 and SM3 might have solved the uneven pulse train. Looking better now. 2024-02-09 17:28:18 +01:00
Hakan Bastedt
d0433b29cf cleanup and removing StepGen from active code 2024-02-08 21:33:31 +01:00
Hakan Bastedt
fe3de876fa Class StepGen2 done after Stepgen.odb 2024-02-08 21:28:48 +01:00
Hakan Bastedt
2fb5252d37 CircularBuffer.h new file ending hpp due to version 1.4 od CB 2024-02-08 19:06:55 +01:00
Hakan Bastedt
43854ca4d0 wip 2024-02-05 21:22:23 +01:00
Hakan Bastedt
dbb4d0f34e Update 2024-02-05 20:32:49 +01:00
Hakan Bastedt
f9b37cfa6c Document stepgen 2024-02-05 01:04:20 +01:00
Hakan Bastedt
2b2704bb17 Added timer2 for proper start point 2024-02-02 21:43:58 +01:00
Hakan Bastedt
0384646972 wip 2024-02-02 15:26:01 +01:00
Hakan Bastedt
133df5662d wip, before timer stuff 2024-02-02 12:09:49 +01:00
Hakan Bastedt
d1eb1d9a40 logic might be there 2024-02-01 20:30:02 +01:00
Hakan Bastedt
e641fd04b7 First component placement 2024-01-25 00:27:56 +01:00
Hakan Bastedt
e7fc20fec5 micros() in irq is suspicous. Some optomization of stepper parameters. Comments. 2024-01-23 22:40:15 +01:00
Hakan Bastedt
f8cec1ac69 How many times to fix it? 2024-01-23 17:51:44 +01:00
Hakan Bastedt
ddffbe5f8b Actually don't run ecat-slv_poll() 2024-01-23 15:48:59 +01:00
Hakan Bastedt
c97e1fa96a Moved ESCvar.PrevTime. It's not used though 2024-01-23 11:22:09 +01:00
Hakan Bastedt
ef84d552e4 Debug comments 2024-01-23 11:17:00 +01:00
Hakan Bastedt
d93adac4a2 Don't run ecat_slv_poll() when expecting to serve interrupt 2024-01-23 11:00:47 +01:00
Hakan Bastedt
b534e3d4da Kludge with 'tone' of steppers. Gives ferror, but nice tone 2024-01-21 23:29:59 +01:00
Hakan Bastedt
1f97534133 New pwmCycleTime different from sync0CycleTime 2024-01-20 12:37:42 +01:00
Hakan Bastedt
e6bfe4f880 Tests for growling. That 10xcycle time seems to do it, but it's not right. 2024-01-19 21:31:15 +01:00
Hakan Bastedt
8f05f33e58 Both steppers work in simulated environment 2024-01-18 18:21:21 +01:00
Hakan Bastedt
9e311038c1 TIM8 replaced with TIM3. TIM3,chan4 works on PC9. TIM8,chan4 should work but doesn't. How should one know? 2024-01-18 17:21:12 +01:00
Hakan Bastedt
9ab4afabe4 New enable input. Add dc ability. Set only SM2 synchronization. Various to make lathe work 2024-01-18 14:26:51 +01:00
Hakan Bastedt
38825bbaf3 Trying to make stepper suing tim8 work 2024-01-18 14:25:19 +01:00
Hakan Bastedt
0a04124b35 Remove TIM8, TIM8 is stepper generator timer. 2024-01-17 00:29:06 +01:00
Hakan Bastedt
760944afe5 Various improvements. New pdo variable stepsPerMM. 2024-01-17 00:24:17 +01:00
Hakan Bastedt
044e8fd2c5 Removed unnecessary condition in timerCB, was aleady test on ´steps´ 2024-01-15 23:10:25 +01:00
Hakan Bastedt
697ea19dae Bug, digitalWrite of stepPin should be dirPin in timerCB. Reshuffling 2024-01-15 23:07:46 +01:00
Hakan Bastedt
20ca9d4974 Maybe works better now. Using G0 can not provoke the scrape sound. Jogging for a long while can provoke still. 2024-01-15 21:12:23 +01:00
Hakan Bastedt
c6857d0be2 Still problem with overlapping cycles in stepgen. TIM8 works for stepgen now. 2024-01-15 20:21:14 +01:00