Hakan Bastedt 6d18c2cb3f Clear ALevents for DC_sync0 and SM3 might have solved the uneven pulse train. Looking better now.

2024-02-09 17:28:18 +01:00

..

.vscode

logic might be there

2024-02-01 20:30:02 +01:00

doc

Class StepGen2 done after Stepgen.odb

2024-02-08 21:28:48 +01:00

include

Clear ALevents for DC_sync0 and SM3 might have solved the uneven pulse train. Looking better now.

2024-02-09 17:28:18 +01:00

lib

New enable input. Add dc ability. Set only SM2 synchronization. Various to make lathe work

2024-01-18 14:26:51 +01:00

src

Clear ALevents for DC_sync0 and SM3 might have solved the uneven pulse train. Looking better now.

2024-02-09 17:28:18 +01:00

test

Reshuffle file structure

2023-12-31 09:17:42 +01:00

.gitignore

Reshuffle file structure

2023-12-31 09:17:42 +01:00

platformio.ini

ooops it was set to use DC sync, not the intention, SM2 sync was intended. Switch to SM2 sync

2024-01-05 21:33:06 +01:00