Compare commits
3 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
|
ed0414b90a | ||
|
|
1d8adf2147 | ||
|
|
4c4aa7aab1 |
1
.gitignore
vendored
1
.gitignore
vendored
@@ -3,4 +3,3 @@
|
|||||||
.vscode/c_cpp_properties.json
|
.vscode/c_cpp_properties.json
|
||||||
.vscode/launch.json
|
.vscode/launch.json
|
||||||
.vscode/ipch
|
.vscode/ipch
|
||||||
Octave
|
|
||||||
|
|||||||
1
Firmware/doc/.gitignore
vendored
1
Firmware/doc/.gitignore
vendored
@@ -1 +0,0 @@
|
|||||||
.~lock.*
|
|
||||||
Binary file not shown.
@@ -1,38 +0,0 @@
|
|||||||
#ifndef MYENCODER
|
|
||||||
#define MYENCODER
|
|
||||||
#include "Stm32F4_Encoder.h"
|
|
||||||
#include <CircularBuffer.hpp>
|
|
||||||
#define RINGBUFFERLEN 11
|
|
||||||
|
|
||||||
class MyEncoder
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
MyEncoder(TIM_TypeDef *_tim_base, uint8_t _indexPin, void irq(void));
|
|
||||||
int64_t unwrapEncoder(uint16_t in);
|
|
||||||
void indexPulse(void);
|
|
||||||
uint8_t indexHappened();
|
|
||||||
double currentPos();
|
|
||||||
double frequency(uint64_t time);
|
|
||||||
uint8_t getIndexState();
|
|
||||||
void setScale(double scale);
|
|
||||||
void setLatch(uint8_t latchEnable);
|
|
||||||
|
|
||||||
private:
|
|
||||||
int64_t previousEncoderCounterValue = 0;
|
|
||||||
double PosScaleRes = 1.0;
|
|
||||||
uint32_t CurPosScale = 1;
|
|
||||||
uint8_t oldLatchCEnable = 0;
|
|
||||||
volatile uint8_t indexPulseFired = 0;
|
|
||||||
volatile uint8_t pleaseZeroTheCounter = 0;
|
|
||||||
Encoder EncoderInit;
|
|
||||||
uint8_t indexPin;
|
|
||||||
|
|
||||||
CircularBuffer<double_t, RINGBUFFERLEN> Pos;
|
|
||||||
CircularBuffer<uint32_t, RINGBUFFERLEN> TDelta;
|
|
||||||
double curPos;
|
|
||||||
double oldFrequency;
|
|
||||||
|
|
||||||
TIM_TypeDef *tim_base;
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@@ -1,43 +0,0 @@
|
|||||||
|
|
||||||
#ifndef STEPGEN
|
|
||||||
#define STEPGEN
|
|
||||||
#include <HardwareTimer.h>
|
|
||||||
|
|
||||||
class StepGen
|
|
||||||
{
|
|
||||||
private:
|
|
||||||
volatile uint8_t timerIsRunning;
|
|
||||||
volatile int32_t timerStepPosition;
|
|
||||||
volatile int32_t timerStepDirection;
|
|
||||||
volatile int32_t timerStepPositionAtEnd;
|
|
||||||
volatile int32_t timerNewEndStepPosition;
|
|
||||||
volatile uint32_t timerNewCycleTime;
|
|
||||||
volatile double_t actualPosition;
|
|
||||||
volatile double_t requestedPosition;
|
|
||||||
volatile uint8_t enabled;
|
|
||||||
HardwareTimer *MyTim;
|
|
||||||
HardwareTimer *MyTim2;
|
|
||||||
uint16_t stepsPerMM;
|
|
||||||
uint8_t dirPin;
|
|
||||||
PinName stepPin;
|
|
||||||
uint32_t timerChan;
|
|
||||||
const uint32_t maxFreq = 100000;
|
|
||||||
volatile uint32_t prevFreq1 = 0;
|
|
||||||
volatile uint32_t prevFreq2 = 0;
|
|
||||||
|
|
||||||
public:
|
|
||||||
static uint32_t sync0CycleTime;
|
|
||||||
volatile uint32_t pwmCycleTime;
|
|
||||||
|
|
||||||
StepGen(TIM_TypeDef *Timer, uint32_t timerChannel, PinName stepPin, uint8_t dirPin, void irq(void));
|
|
||||||
void reqPos(double_t pos);
|
|
||||||
double reqPos();
|
|
||||||
void actPos(double_t pos);
|
|
||||||
double actPos();
|
|
||||||
void handleStepper(void);
|
|
||||||
void timerCB();
|
|
||||||
void setScale(int16_t spm);
|
|
||||||
void enable(uint8_t yes);
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@@ -1,53 +0,0 @@
|
|||||||
|
|
||||||
#ifndef STEPGEN
|
|
||||||
#define STEPGEN
|
|
||||||
#include <HardwareTimer.h>
|
|
||||||
|
|
||||||
class StepGen2
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
volatile double_t actualPosition;
|
|
||||||
volatile int32_t nSteps;
|
|
||||||
volatile uint32_t timerFrequency;
|
|
||||||
volatile int32_t timerPosition = 0;
|
|
||||||
volatile int32_t timerEndPosition = 0;
|
|
||||||
|
|
||||||
public:
|
|
||||||
volatile float Tstartf; // Starting delay in secs
|
|
||||||
volatile uint32_t Tstartu; // Starting delay in usecs
|
|
||||||
volatile float Tpulses; // Time it takes to do pulses. Debug
|
|
||||||
|
|
||||||
HardwareTimer *pulseTimer;
|
|
||||||
uint32_t pulseTimerChan;
|
|
||||||
HardwareTimer *startTimer; // Use timers 10,11,13,14
|
|
||||||
uint8_t dirPin;
|
|
||||||
PinName dirPinName;
|
|
||||||
PinName stepPin;
|
|
||||||
uint32_t Tjitter = 400; // Longest time from IRQ to handling in handleStepper, unit is microseconds
|
|
||||||
uint64_t dbg;
|
|
||||||
const uint16_t t2 = 5; // DIR is ahead of PUL with at least 5 usecs
|
|
||||||
const uint16_t t3 = 5; // Pulse width at least 2.5 usecs
|
|
||||||
const uint16_t t4 = 5; // Low level width not less than 2.5 usecs
|
|
||||||
const float maxAllowedFrequency = 1000000 / float(t3 + t4) * 0.9; // 150 kHz for now
|
|
||||||
|
|
||||||
public:
|
|
||||||
volatile double_t commandedPosition; // End position when this cycle is completed
|
|
||||||
volatile int32_t commandedStepPosition; // End step position when this cycle is completed
|
|
||||||
volatile double_t initialPosition; // From previous cycle
|
|
||||||
volatile int32_t initialStepPosition; // From previous cycle
|
|
||||||
int16_t stepsPerMM; // This many steps per mm
|
|
||||||
volatile uint8_t enabled; // Enabled step generator
|
|
||||||
volatile float frequency;
|
|
||||||
|
|
||||||
static uint32_t sync0CycleTime; // Nominal EtherCAT cycle time nanoseconds
|
|
||||||
volatile float lcncCycleTime; // Linuxcnc nominal cycle time in sec (1 ms often)
|
|
||||||
|
|
||||||
StepGen2(TIM_TypeDef *Timer, uint32_t _timerChannel, PinName _stepPin, uint8_t _dirPin, void irq(void), TIM_TypeDef *Timer2, void irq2(void));
|
|
||||||
|
|
||||||
uint32_t handleStepper(uint64_t irqTime /* time when irq happened nanosecs */, uint16_t nLoops);
|
|
||||||
void startTimerCB();
|
|
||||||
void pulseTimerCB();
|
|
||||||
uint32_t updatePos(uint32_t i);
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@@ -1,156 +0,0 @@
|
|||||||
|
|
||||||
#ifndef STEPGEN3
|
|
||||||
#define STEPGEN3
|
|
||||||
#include <HardwareTimer.h>
|
|
||||||
|
|
||||||
#define MAX_CHAN 16
|
|
||||||
#define MAX_CYCLE 18
|
|
||||||
#define USER_STEP_TYPE 13
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
/* stuff that is both read and written by makepulses */
|
|
||||||
volatile unsigned int timer1; /* times out when step pulse should end */
|
|
||||||
volatile unsigned int timer2; /* times out when safe to change dir */
|
|
||||||
volatile unsigned int timer3; /* times out when safe to step in new dir */
|
|
||||||
volatile int hold_dds; /* prevents accumulator from updating */
|
|
||||||
volatile long addval; /* actual frequency generator add value */
|
|
||||||
volatile long long accum; /* frequency generator accumulator */
|
|
||||||
volatile int rawcount; /* param: position feedback in counts */
|
|
||||||
volatile int curr_dir; /* current direction */
|
|
||||||
volatile int state; /* current position in state table */
|
|
||||||
/* stuff that is read but not written by makepulses */
|
|
||||||
volatile int enable; /* pin for enable stepgen */
|
|
||||||
volatile int target_addval; /* desired freq generator add value */
|
|
||||||
volatile long deltalim; /* max allowed change per period */
|
|
||||||
volatile int step_len; /* parameter: step pulse length */
|
|
||||||
volatile unsigned int dir_hold_dly; /* param: direction hold time or delay */
|
|
||||||
volatile unsigned int dir_setup; /* param: direction setup time */
|
|
||||||
volatile int step_type; /* stepping type - see list above */
|
|
||||||
volatile int cycle_max; /* cycle length for step types 2 and up */
|
|
||||||
volatile int num_phases; /* number of phases for types 2 and up */
|
|
||||||
volatile int phase[5]; /* pins for output signals */
|
|
||||||
volatile const unsigned char *lut; /* pointer to state lookup table */
|
|
||||||
/* stuff that is not accessed by makepulses */
|
|
||||||
int pos_mode; /* 1 = position mode, 0 = velocity mode */
|
|
||||||
unsigned int step_space; /* parameter: min step pulse spacing */
|
|
||||||
double old_pos_cmd; /* previous position command (counts) */
|
|
||||||
int count; /* pin: captured feedback in counts */
|
|
||||||
#define double float
|
|
||||||
double pos_scale; /* param: steps per position unit */
|
|
||||||
double old_scale; /* stored scale value */
|
|
||||||
double scale_recip; /* reciprocal value used for scaling */
|
|
||||||
double vel_cmd; /* pin: velocity command (pos units/sec) */
|
|
||||||
double pos_cmd; /* pin: position command (position units) */
|
|
||||||
double pos_fb; /* pin: position feedback (position units) */
|
|
||||||
double freq; /* param: frequency command */
|
|
||||||
double maxvel; /* param: max velocity, (pos units/sec) */
|
|
||||||
double maxaccel; /* param: max accel (pos units/sec^2) */
|
|
||||||
unsigned int old_step_len; /* used to detect parameter changes */
|
|
||||||
unsigned int old_step_space;
|
|
||||||
unsigned int old_dir_hold_dly;
|
|
||||||
unsigned int old_dir_setup;
|
|
||||||
int printed_error; /* flag to avoid repeated printing */
|
|
||||||
} stepgen_t;
|
|
||||||
|
|
||||||
#define MAX_STEP_TYPE 15
|
|
||||||
|
|
||||||
#define STEP_PIN 0 /* output phase used for STEP signal */
|
|
||||||
#define DIR_PIN 1 /* output phase used for DIR signal */
|
|
||||||
#define UP_PIN 0 /* output phase used for UP signal */
|
|
||||||
#define DOWN_PIN 1 /* output phase used for DOWN signal */
|
|
||||||
|
|
||||||
#define PICKOFF 28 /* bit location in DDS accum */
|
|
||||||
|
|
||||||
typedef enum CONTROL
|
|
||||||
{
|
|
||||||
POSITION,
|
|
||||||
VELOCITY,
|
|
||||||
INVALID
|
|
||||||
} CONTROL;
|
|
||||||
|
|
||||||
class StepGen3
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
int step_type[MAX_CHAN] = {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}; // stepping types for up to 16 channels
|
|
||||||
char *ctrl_type[MAX_CHAN] = {0}; // control type ("p"pos or "v"vel) for up to 16 channels
|
|
||||||
int user_step_type[MAX_CYCLE] = {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}; // lookup table for user-defined step type
|
|
||||||
uint32_t stepPin[MAX_CHAN] = {0};
|
|
||||||
uint32_t dirPin[MAX_CHAN] = {0};
|
|
||||||
|
|
||||||
stepgen_t *stepgen_array = 0;
|
|
||||||
|
|
||||||
int num_chan = 0; // number of step generators configured */
|
|
||||||
long periodns; // makepulses function period in nanosec */
|
|
||||||
long old_periodns; // used to detect changes in periodns */
|
|
||||||
double periodfp; // makepulses function period in seconds */
|
|
||||||
double freqscale; // conv. factor from Hz to addval counts */
|
|
||||||
double accelscale; // conv. Hz/sec to addval cnts/period */
|
|
||||||
long old_dtns; // update_freq funct period in nsec */
|
|
||||||
double dt; // update_freq period in seconds */
|
|
||||||
double recip_dt; // recprocal of period, avoids divides */
|
|
||||||
volatile uint64_t cnt = 0; // Debug counter
|
|
||||||
#undef double
|
|
||||||
StepGen3(void);
|
|
||||||
void updateStepGen(double pos_cmd1, double pos_cmd2);
|
|
||||||
void makeAllPulses(void);
|
|
||||||
int rtapi_app_main();
|
|
||||||
int export_stepgen(int num, stepgen_t *addr, int step_type, int pos_mode);
|
|
||||||
void make_pulses(void *arg, long period);
|
|
||||||
void update_freq(void *arg, long period);
|
|
||||||
void update_pos(void *arg, long period);
|
|
||||||
int setup_user_step_type(void);
|
|
||||||
CONTROL parse_ctrl_type(const char *ctrl);
|
|
||||||
unsigned long ulceil(unsigned long value, unsigned long increment);
|
|
||||||
|
|
||||||
private:
|
|
||||||
/* lookup tables for stepping types 2 and higher - phase A is the LSB */
|
|
||||||
|
|
||||||
unsigned char master_lut[MAX_STEP_TYPE][MAX_CYCLE] = {
|
|
||||||
{1, 3, 2, 0, 0, 0, 0, 0, 0, 0}, /* type 2: Quadrature */
|
|
||||||
{1, 2, 4, 0, 0, 0, 0, 0, 0, 0}, /* type 3: Three Wire */
|
|
||||||
{1, 3, 2, 6, 4, 5, 0, 0, 0, 0}, /* type 4: Three Wire Half Step */
|
|
||||||
{1, 2, 4, 8, 0, 0, 0, 0, 0, 0}, /* 5: Unipolar Full Step 1 */
|
|
||||||
{3, 6, 12, 9, 0, 0, 0, 0, 0, 0}, /* 6: Unipoler Full Step 2 */
|
|
||||||
{1, 7, 14, 8, 0, 0, 0, 0, 0, 0}, /* 7: Bipolar Full Step 1 */
|
|
||||||
{5, 6, 10, 9, 0, 0, 0, 0, 0, 0}, /* 8: Bipoler Full Step 2 */
|
|
||||||
{1, 3, 2, 6, 4, 12, 8, 9, 0, 0}, /* 9: Unipolar Half Step */
|
|
||||||
{1, 5, 7, 6, 14, 10, 8, 9, 0, 0}, /* 10: Bipolar Half Step */
|
|
||||||
{1, 2, 4, 8, 16, 0, 0, 0, 0, 0}, /* 11: Five Wire Unipolar */
|
|
||||||
{3, 6, 12, 24, 17, 0, 0, 0, 0, 0}, /* 12: Five Wire Wave */
|
|
||||||
{1, 3, 2, 6, 4, 12, 8, 24, 16, 17}, /* 13: Five Wire Uni Half */
|
|
||||||
{3, 7, 6, 14, 12, 28, 24, 25, 17, 19}, /* 14: Five Wire Wave Half */
|
|
||||||
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* 15: User-defined */
|
|
||||||
};
|
|
||||||
|
|
||||||
unsigned char cycle_len_lut[14] =
|
|
||||||
{4, 3, 6, 4, 4, 4, 4, 8, 8, 5, 5, 10, 10, 0};
|
|
||||||
|
|
||||||
unsigned char num_phases_lut[14] =
|
|
||||||
{
|
|
||||||
2,
|
|
||||||
3,
|
|
||||||
3,
|
|
||||||
4,
|
|
||||||
4,
|
|
||||||
4,
|
|
||||||
4,
|
|
||||||
4,
|
|
||||||
4,
|
|
||||||
5,
|
|
||||||
5,
|
|
||||||
5,
|
|
||||||
5,
|
|
||||||
0,
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
// For the example
|
|
||||||
#define BASE_PERIOD 20000
|
|
||||||
#define SERVO_PERIOD 2000000
|
|
||||||
#define JOINT_X_STEPGEN_MAXACCEL 0.0
|
|
||||||
#define JOINT_Z_STEPGEN_MAXACCEL 0.0
|
|
||||||
#define JOINT_X_SCALE -200
|
|
||||||
#define JOINT_Z_SCALE -80
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@@ -1,652 +0,0 @@
|
|||||||
|
|
||||||
#ifndef __Stm32F4_Encoder_H__
|
|
||||||
#define __Stm32F4_Encoder_H__
|
|
||||||
#include <Arduino.h>
|
|
||||||
|
|
||||||
#define GPIO_Speed_50MHz 0x02 /*!< Fast speed */
|
|
||||||
|
|
||||||
// #define GPIO_MODER_MODER0 ((uint32_t)0x00000003)
|
|
||||||
#define GPIO_Mode_OUT 0x01
|
|
||||||
// #define GPIO_OSPEEDER_OSPEEDR0 ((uint32_t)0x00000003)
|
|
||||||
// #define GPIO_OTYPER_OT_0 ((uint32_t)0x00000001)
|
|
||||||
// #define GPIO_PUPDR_PUPDR0 ((uint32_t)0x00000003)
|
|
||||||
|
|
||||||
#define GPIO_PuPd_NOPULL 0x00
|
|
||||||
#define GPIO_Mode_AF 0x02
|
|
||||||
#define GPIO_OType_PP 0x00
|
|
||||||
#define GPIO_PuPd_NOPULL 0x00
|
|
||||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
|
|
||||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
|
|
||||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
|
|
||||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
|
|
||||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
|
|
||||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
|
|
||||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
|
|
||||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
|
|
||||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */
|
|
||||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */
|
|
||||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */
|
|
||||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */
|
|
||||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */
|
|
||||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */
|
|
||||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */
|
|
||||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */
|
|
||||||
#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
|
|
||||||
|
|
||||||
typedef struct TIM_TimeBaseInitTypeDef
|
|
||||||
{
|
|
||||||
uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
|
|
||||||
This parameter can be a number between 0x0000 and 0xFFFF */
|
|
||||||
|
|
||||||
uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
|
|
||||||
This parameter can be a value of @ref TIM_Counter_Mode */
|
|
||||||
|
|
||||||
uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
|
|
||||||
Auto-Reload Register at the next update event.
|
|
||||||
This parameter must be a number between 0x0000 and 0xFFFF. */
|
|
||||||
|
|
||||||
uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
|
|
||||||
This parameter can be a value of @ref TIM_Clock_Division_CKD */
|
|
||||||
|
|
||||||
uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
|
|
||||||
reaches zero, an update event is generated and counting restarts
|
|
||||||
from the RCR value (N).
|
|
||||||
This means in PWM mode that (N+1) corresponds to:
|
|
||||||
- the number of PWM periods in edge-aligned mode
|
|
||||||
- the number of half PWM period in center-aligned mode
|
|
||||||
This parameter must be a number between 0x00 and 0xFF.
|
|
||||||
@note This parameter is valid only for TIM1 and TIM8. */
|
|
||||||
} TIM_TimeBaseInitTypeDef;
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
uint16_t setcount;
|
|
||||||
|
|
||||||
} encoder;
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
|
|
||||||
|
|
||||||
uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_State */
|
|
||||||
|
|
||||||
uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_N_State
|
|
||||||
@note This parameter is valid only for TIM1 and TIM8. */
|
|
||||||
|
|
||||||
uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
|
|
||||||
This parameter can be a number between 0x0000 and 0xFFFF */
|
|
||||||
|
|
||||||
uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
|
|
||||||
|
|
||||||
uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
|
|
||||||
@note This parameter is valid only for TIM1 and TIM8. */
|
|
||||||
|
|
||||||
uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
|
|
||||||
@note This parameter is valid only for TIM1 and TIM8. */
|
|
||||||
|
|
||||||
uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
|
||||||
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
|
|
||||||
@note This parameter is valid only for TIM1 and TIM8. */
|
|
||||||
} TIM_OCInitTypeDef;
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
|
|
||||||
uint16_t TIM_Channel; /*!< Specifies the TIM channel.
|
|
||||||
This parameter can be a value of @ref TIM_Channel */
|
|
||||||
|
|
||||||
uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
|
|
||||||
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
|
|
||||||
|
|
||||||
uint16_t TIM_ICSelection; /*!< Specifies the input.
|
|
||||||
This parameter can be a value of @ref TIM_Input_Capture_Selection */
|
|
||||||
|
|
||||||
uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
|
|
||||||
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
|
|
||||||
|
|
||||||
uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
|
|
||||||
This parameter can be a number between 0x0 and 0xF */
|
|
||||||
} TIM_ICInitTypeDef;
|
|
||||||
|
|
||||||
typedef struct
|
|
||||||
{
|
|
||||||
|
|
||||||
uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
|
|
||||||
This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
|
|
||||||
|
|
||||||
uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
|
|
||||||
This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
|
|
||||||
|
|
||||||
uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
|
|
||||||
This parameter can be a value of @ref TIM_Lock_level */
|
|
||||||
|
|
||||||
uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
|
|
||||||
switching-on of the outputs.
|
|
||||||
This parameter can be a number between 0x00 and 0xFF */
|
|
||||||
|
|
||||||
uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
|
|
||||||
This parameter can be a value of @ref TIM_Break_Input_enable_disable */
|
|
||||||
|
|
||||||
uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
|
|
||||||
This parameter can be a value of @ref TIM_Break_Polarity */
|
|
||||||
|
|
||||||
uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
|
|
||||||
This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
|
|
||||||
} TIM_BDTRInitTypeDef;
|
|
||||||
|
|
||||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
|
||||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
|
||||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
|
||||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
|
||||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
|
||||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
|
||||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
|
||||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
|
||||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
|
||||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
|
||||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
|
||||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
|
||||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
|
||||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
|
||||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
|
||||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
|
||||||
#define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
|
|
||||||
#define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
|
|
||||||
#define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
|
|
||||||
#define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
|
|
||||||
#define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
|
|
||||||
#define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
|
|
||||||
|
|
||||||
// #define TIM4 ((TIM_TypeDef *)TIM4_BASE)
|
|
||||||
// #define TIM8 ((TIM_TypeDef *)TIM8_BASE)
|
|
||||||
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
|
||||||
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
|
||||||
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
|
||||||
// #define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
|
|
||||||
// #define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
|
|
||||||
|
|
||||||
#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|
||||||
((PERIPH) == TIM2) || \
|
|
||||||
((PERIPH) == TIM3) || \
|
|
||||||
((PERIPH) == TIM4) || \
|
|
||||||
((PERIPH) == TIM5) || \
|
|
||||||
((PERIPH) == TIM6) || \
|
|
||||||
((PERIPH) == TIM7) || \
|
|
||||||
((PERIPH) == TIM8) || \
|
|
||||||
((PERIPH) == TIM9) || \
|
|
||||||
((PERIPH) == TIM10) || \
|
|
||||||
((PERIPH) == TIM11) || \
|
|
||||||
((PERIPH) == TIM12) || \
|
|
||||||
(((PERIPH) == TIM13) || \
|
|
||||||
((PERIPH) == TIM14)))
|
|
||||||
|
|
||||||
#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|
||||||
((PERIPH) == TIM2) || \
|
|
||||||
((PERIPH) == TIM3) || \
|
|
||||||
((PERIPH) == TIM4) || \
|
|
||||||
((PERIPH) == TIM5) || \
|
|
||||||
((PERIPH) == TIM8) || \
|
|
||||||
((PERIPH) == TIM9) || \
|
|
||||||
((PERIPH) == TIM10) || \
|
|
||||||
((PERIPH) == TIM11) || \
|
|
||||||
((PERIPH) == TIM12) || \
|
|
||||||
((PERIPH) == TIM13) || \
|
|
||||||
((PERIPH) == TIM14))
|
|
||||||
|
|
||||||
#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|
||||||
((PERIPH) == TIM2) || \
|
|
||||||
((PERIPH) == TIM3) || \
|
|
||||||
((PERIPH) == TIM4) || \
|
|
||||||
((PERIPH) == TIM5) || \
|
|
||||||
((PERIPH) == TIM8) || \
|
|
||||||
((PERIPH) == TIM9) || \
|
|
||||||
((PERIPH) == TIM12))
|
|
||||||
|
|
||||||
#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|
||||||
((PERIPH) == TIM2) || \
|
|
||||||
((PERIPH) == TIM3) || \
|
|
||||||
((PERIPH) == TIM4) || \
|
|
||||||
((PERIPH) == TIM5) || \
|
|
||||||
((PERIPH) == TIM8))
|
|
||||||
|
|
||||||
#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|
||||||
((PERIPH) == TIM8))
|
|
||||||
|
|
||||||
#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
|
||||||
((PERIPH) == TIM2) || \
|
|
||||||
((PERIPH) == TIM3) || \
|
|
||||||
((PERIPH) == TIM4) || \
|
|
||||||
((PERIPH) == TIM5) || \
|
|
||||||
((PERIPH) == TIM6) || \
|
|
||||||
((PERIPH) == TIM7) || \
|
|
||||||
((PERIPH) == TIM8))
|
|
||||||
|
|
||||||
#define IS_TIM_LIST6_PERIPH(TIMx) (((TIMx) == TIM2) || \
|
|
||||||
((TIMx) == TIM5) || \
|
|
||||||
((TIMx) == TIM11))
|
|
||||||
|
|
||||||
#define TIM_OCMode_Timing ((uint16_t)0x0000)
|
|
||||||
#define TIM_OCMode_Active ((uint16_t)0x0010)
|
|
||||||
#define TIM_OCMode_Inactive ((uint16_t)0x0020)
|
|
||||||
#define TIM_OCMode_Toggle ((uint16_t)0x0030)
|
|
||||||
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
|
|
||||||
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
|
|
||||||
//#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
|
||||||
// ((MODE) == TIM_OCMode_Active) || \
|
|
||||||
// ((MODE) == TIM_OCMode_Inactive) || \
|
|
||||||
// ((MODE) == TIM_OCMode_Toggle)|| \
|
|
||||||
// ((MODE) == TIM_OCMode_PWM1) || \
|
|
||||||
// ((MODE) == TIM_OCMode_PWM2))
|
|
||||||
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
|
||||||
((MODE) == TIM_OCMode_Active) || \
|
|
||||||
((MODE) == TIM_OCMode_Inactive) || \
|
|
||||||
((MODE) == TIM_OCMode_Toggle) || \
|
|
||||||
((MODE) == TIM_OCMode_PWM1) || \
|
|
||||||
((MODE) == TIM_OCMode_PWM2) || \
|
|
||||||
((MODE) == TIM_ForcedAction_Active) || \
|
|
||||||
((MODE) == TIM_ForcedAction_InActive))
|
|
||||||
|
|
||||||
#define TIM_OPMode_Single ((uint16_t)0x0008)
|
|
||||||
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
|
|
||||||
// ((MODE) == TIM_OPMode_Repetitive))
|
|
||||||
|
|
||||||
#define TIM_Channel_1 ((uint16_t)0x0000)
|
|
||||||
#define TIM_Channel_2 ((uint16_t)0x0004)
|
|
||||||
#define TIM_Channel_3 ((uint16_t)0x0008)
|
|
||||||
#define TIM_Channel_4 ((uint16_t)0x000C)
|
|
||||||
|
|
||||||
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
|
||||||
((CHANNEL) == TIM_Channel_2) || \
|
|
||||||
((CHANNEL) == TIM_Channel_3) || \
|
|
||||||
((CHANNEL) == TIM_Channel_4))
|
|
||||||
|
|
||||||
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
|
||||||
((CHANNEL) == TIM_Channel_2))
|
|
||||||
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
|
||||||
((CHANNEL) == TIM_Channel_2) || \
|
|
||||||
((CHANNEL) == TIM_Channel_3))
|
|
||||||
|
|
||||||
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
|
|
||||||
#define TIM_CKD_DIV2 ((uint16_t)0x0100)
|
|
||||||
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
|
|
||||||
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
|
|
||||||
((DIV) == TIM_CKD_DIV2) || \
|
|
||||||
((DIV) == TIM_CKD_DIV4))
|
|
||||||
|
|
||||||
#define TIM_CounterMode_Up ((uint16_t)0x0000)
|
|
||||||
#define TIM_CounterMode_Down ((uint16_t)0x0010)
|
|
||||||
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
|
|
||||||
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
|
|
||||||
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
|
|
||||||
//#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
|
|
||||||
// ((MODE) == TIM_CounterMode_Down) || \
|
|
||||||
// ((MODE) == TIM_CounterMode_CenterAligned1) || \
|
|
||||||
// ((MODE) == TIM_CounterMode_CenterAligned2) || \
|
|
||||||
// ((MODE) == TIM_CounterMode_CenterAligned3))
|
|
||||||
|
|
||||||
#define TIM_OCPolarity_High ((uint16_t)0x0000)
|
|
||||||
#define TIM_OCPolarity_Low ((uint16_t)0x0002)
|
|
||||||
//#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
|
|
||||||
// ((POLARITY) == TIM_OCPolarity_Low))
|
|
||||||
|
|
||||||
#define TIM_OCNPolarity_High ((uint16_t)0x0000)
|
|
||||||
#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
|
|
||||||
//#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
|
|
||||||
// ((POLARITY) == TIM_OCNPolarity_Low))
|
|
||||||
|
|
||||||
#define TIM_OutputState_Disable ((uint16_t)0x0000)
|
|
||||||
#define TIM_OutputState_Enable ((uint16_t)0x0001)
|
|
||||||
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
|
|
||||||
((STATE) == TIM_OutputState_Enable))
|
|
||||||
|
|
||||||
#define TIM_OutputNState_Disable ((uint16_t)0x0000)
|
|
||||||
#define TIM_OutputNState_Enable ((uint16_t)0x0004)
|
|
||||||
#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
|
|
||||||
((STATE) == TIM_OutputNState_Enable))
|
|
||||||
|
|
||||||
#define TIM_CCx_Enable ((uint16_t)0x0001)
|
|
||||||
#define TIM_CCx_Disable ((uint16_t)0x0000)
|
|
||||||
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
|
|
||||||
((CCX) == TIM_CCx_Disable))
|
|
||||||
|
|
||||||
#define TIM_CCxN_Enable ((uint16_t)0x0004)
|
|
||||||
#define TIM_CCxN_Disable ((uint16_t)0x0000)
|
|
||||||
#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
|
|
||||||
((CCXN) == TIM_CCxN_Disable))
|
|
||||||
|
|
||||||
#define TIM_Break_Enable ((uint16_t)0x1000)
|
|
||||||
#define TIM_Break_Disable ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
|
|
||||||
// ((STATE) == TIM_Break_Disable))
|
|
||||||
|
|
||||||
#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
|
|
||||||
#define TIM_BreakPolarity_High ((uint16_t)0x2000)
|
|
||||||
//#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
|
|
||||||
// ((POLARITY) == TIM_BreakPolarity_High))
|
|
||||||
|
|
||||||
#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
|
|
||||||
#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
|
|
||||||
// ((STATE) == TIM_AutomaticOutput_Disable))
|
|
||||||
|
|
||||||
#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
|
|
||||||
#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
|
|
||||||
#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
|
|
||||||
#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
|
|
||||||
//#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
|
|
||||||
// ((LEVEL) == TIM_LOCKLevel_1) || \
|
|
||||||
// ((LEVEL) == TIM_LOCKLevel_2) || \
|
|
||||||
// ((LEVEL) == TIM_LOCKLevel_3))
|
|
||||||
|
|
||||||
#define TIM_OSSIState_Enable ((uint16_t)0x0400)
|
|
||||||
#define TIM_OSSIState_Disable ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
|
|
||||||
// ((STATE) == TIM_OSSIState_Disable))
|
|
||||||
|
|
||||||
#define TIM_OSSRState_Enable ((uint16_t)0x0800)
|
|
||||||
#define TIM_OSSRState_Disable ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
|
|
||||||
// ((STATE) == TIM_OSSRState_Disable))
|
|
||||||
|
|
||||||
#define TIM_OCIdleState_Set ((uint16_t)0x0100)
|
|
||||||
#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
|
|
||||||
// ((STATE) == TIM_OCIdleState_Reset))
|
|
||||||
//
|
|
||||||
|
|
||||||
#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
|
|
||||||
#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
|
|
||||||
// ((STATE) == TIM_OCNIdleState_Reset))
|
|
||||||
|
|
||||||
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
|
||||||
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
|
||||||
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
|
|
||||||
//#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
|
||||||
// ((POLARITY) == TIM_ICPolarity_Falling)|| \
|
|
||||||
// ((POLARITY) == TIM_ICPolarity_BothEdge))
|
|
||||||
|
|
||||||
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be \
|
|
||||||
connected to IC1, IC2, IC3 or IC4, respectively */
|
|
||||||
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be \
|
|
||||||
connected to IC2, IC1, IC4 or IC3, respectively. */
|
|
||||||
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
|
|
||||||
//#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
|
|
||||||
// ((SELECTION) == TIM_ICSelection_IndirectTI) || \
|
|
||||||
// ((SELECTION) == TIM_ICSelection_TRC))
|
|
||||||
|
|
||||||
// #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
|
|
||||||
// #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
|
|
||||||
// #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
|
|
||||||
// #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
|
|
||||||
// #define IS_TIM_IC_PRESCALER(PRESCALER) ( ((PRESCALER) == TIM_ICPSC_DIV1) || \
|
|
||||||
// ((PRESCALER) == TIM_ICPSC_DIV2) || \
|
|
||||||
// ((PRESCALER) == TIM_ICPSC_DIV4) || \
|
|
||||||
// ((PRESCALER) == TIM_ICPSC_DIV8))
|
|
||||||
|
|
||||||
#define TIM_IT_Update ((uint16_t)0x0001)
|
|
||||||
// #define TIM_IT_CC1 ((uint16_t)0x0002)
|
|
||||||
// #define TIM_IT_CC2 ((uint16_t)0x0004)
|
|
||||||
// #define TIM_IT_CC3 ((uint16_t)0x0008)
|
|
||||||
// #define TIM_IT_CC4 ((uint16_t)0x0010)
|
|
||||||
// #define TIM_IT_COM ((uint16_t)0x0020)
|
|
||||||
#define TIM_IT_Trigger ((uint16_t)0x0040)
|
|
||||||
#define TIM_IT_Break ((uint16_t)0x0080)
|
|
||||||
#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
|
|
||||||
|
|
||||||
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
|
|
||||||
((IT) == TIM_IT_CC1) || \
|
|
||||||
((IT) == TIM_IT_CC2) || \
|
|
||||||
((IT) == TIM_IT_CC3) || \
|
|
||||||
((IT) == TIM_IT_CC4) || \
|
|
||||||
((IT) == TIM_IT_COM) || \
|
|
||||||
((IT) == TIM_IT_Trigger) || \
|
|
||||||
((IT) == TIM_IT_Break))
|
|
||||||
|
|
||||||
// #define TIM_DMABase_CR1 ((uint16_t)0x0000)
|
|
||||||
// #define TIM_DMABase_CR2 ((uint16_t)0x0001)
|
|
||||||
// #define TIM_DMABase_SMCR ((uint16_t)0x0002)
|
|
||||||
// #define TIM_DMABase_DIER ((uint16_t)0x0003)
|
|
||||||
// #define TIM_DMABase_SR ((uint16_t)0x0004)
|
|
||||||
// #define TIM_DMABase_EGR ((uint16_t)0x0005)
|
|
||||||
// #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
|
|
||||||
// #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
|
|
||||||
// #define TIM_DMABase_CCER ((uint16_t)0x0008)
|
|
||||||
// #define TIM_DMABase_CNT ((uint16_t)0x0009)
|
|
||||||
// #define TIM_DMABase_PSC ((uint16_t)0x000A)
|
|
||||||
// #define TIM_DMABase_ARR ((uint16_t)0x000B)
|
|
||||||
// #define TIM_DMABase_RCR ((uint16_t)0x000C)
|
|
||||||
// #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
|
|
||||||
// #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
|
|
||||||
// #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
|
|
||||||
// #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
|
|
||||||
// #define TIM_DMABase_BDTR ((uint16_t)0x0011)
|
|
||||||
// #define TIM_DMABase_DCR ((uint16_t)0x0012)
|
|
||||||
// #define TIM_DMABase_OR ((uint16_t)0x0013)
|
|
||||||
// #define IS_TIM_DMA_BASE(BASE) ( ((BASE) == TIM_DMABase_CR1) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CR2) || \
|
|
||||||
// ((BASE) == TIM_DMABase_SMCR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_DIER) || \
|
|
||||||
// ((BASE) == TIM_DMABase_SR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_EGR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCMR1) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCMR2) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCER) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CNT) || \
|
|
||||||
// ((BASE) == TIM_DMABase_PSC) || \
|
|
||||||
// ((BASE) == TIM_DMABase_ARR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_RCR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCR1) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCR2) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCR3) || \
|
|
||||||
// ((BASE) == TIM_DMABase_CCR4) || \
|
|
||||||
// ((BASE) == TIM_DMABase_BDTR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_DCR) || \
|
|
||||||
// ((BASE) == TIM_DMABase_OR))
|
|
||||||
|
|
||||||
// #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
|
|
||||||
// #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
|
|
||||||
// #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
|
|
||||||
// #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
|
|
||||||
// #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
|
|
||||||
// #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
|
|
||||||
// #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
|
|
||||||
// #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
|
|
||||||
// #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
|
|
||||||
// #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
|
|
||||||
// #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
|
|
||||||
// #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
|
|
||||||
// #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
|
|
||||||
// #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
|
|
||||||
// #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
|
|
||||||
// #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
|
|
||||||
// #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
|
|
||||||
// #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
|
|
||||||
// #define IS_TIM_DMA_LENGTH(LENGTH) ( ((LENGTH) == TIM_DMABurstLength_1Transfer) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
|
|
||||||
// ((LENGTH) == TIM_DMABurstLength_18Transfers))
|
|
||||||
|
|
||||||
// #define TIM_DMA_Update ((uint16_t)0x0100)
|
|
||||||
// #define TIM_DMA_CC1 ((uint16_t)0x0200)
|
|
||||||
// #define TIM_DMA_CC2 ((uint16_t)0x0400)
|
|
||||||
// #define TIM_DMA_CC3 ((uint16_t)0x0800)
|
|
||||||
// #define TIM_DMA_CC4 ((uint16_t)0x1000)
|
|
||||||
// #define TIM_DMA_COM ((uint16_t)0x2000)
|
|
||||||
// #define TIM_DMA_Trigger ((uint16_t)0x4000)
|
|
||||||
// #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
|
|
||||||
|
|
||||||
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
|
|
||||||
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
|
|
||||||
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
|
|
||||||
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
|
|
||||||
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
|
|
||||||
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
|
|
||||||
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
|
|
||||||
((PRESCALER) == TIM_ExtTRGPSC_DIV8))
|
|
||||||
|
|
||||||
// #define TIM_TS_ITR0 ((uint16_t)0x0000)
|
|
||||||
// #define TIM_TS_ITR1 ((uint16_t)0x0010)
|
|
||||||
// #define TIM_TS_ITR2 ((uint16_t)0x0020)
|
|
||||||
// #define TIM_TS_ITR3 ((uint16_t)0x0030)
|
|
||||||
// #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
|
|
||||||
// #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
|
|
||||||
// #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
|
|
||||||
// #define TIM_TS_ETRF ((uint16_t)0x0070)
|
|
||||||
// #def ine IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
|
||||||
// ((SELECTION) == TIM_TS_ITR1) || \
|
|
||||||
// ((SELECTION) == TIM_TS_ITR2) || \
|
|
||||||
// ((SELECTION) == TIM_TS_ITR3) || \
|
|
||||||
// ((SELECTION) == TIM_TS_TI1F_ED) || \
|
|
||||||
// ((SELECTION) == TIM_TS_TI1FP1) || \
|
|
||||||
// ((SELECTION) == TIM_TS_TI2FP2) || \
|
|
||||||
// ((SELECTION) == TIM_TS_ETRF))
|
|
||||||
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
|
||||||
((SELECTION) == TIM_TS_ITR1) || \
|
|
||||||
((SELECTION) == TIM_TS_ITR2) || \
|
|
||||||
((SELECTION) == TIM_TS_ITR3))
|
|
||||||
|
|
||||||
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
|
|
||||||
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
|
|
||||||
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
|
|
||||||
|
|
||||||
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
|
|
||||||
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
|
|
||||||
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
|
|
||||||
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
|
|
||||||
|
|
||||||
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
|
|
||||||
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
|
|
||||||
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
|
|
||||||
((RELOAD) == TIM_PSCReloadMode_Immediate))
|
|
||||||
|
|
||||||
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
|
|
||||||
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
|
|
||||||
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
|
|
||||||
((ACTION) == TIM_ForcedAction_InActive))
|
|
||||||
|
|
||||||
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
|
|
||||||
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
|
|
||||||
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
|
||||||
//#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
|
|
||||||
// ((MODE) == TIM_EncoderMode_TI2) || \
|
|
||||||
// ((MODE) == TIM_EncoderMode_TI12))
|
|
||||||
|
|
||||||
// #define TIM_EventSource_Update ((uint16_t)0x0001)
|
|
||||||
// #define TIM_EventSource_CC1 ((uint16_t)0x0002)
|
|
||||||
// #define TIM_EventSource_CC2 ((uint16_t)0x0004)
|
|
||||||
// #define TIM_EventSource_CC3 ((uint16_t)0x0008)
|
|
||||||
// #define TIM_EventSource_CC4 ((uint16_t)0x0010)
|
|
||||||
// #define TIM_EventSource_COM ((uint16_t)0x0020)
|
|
||||||
// #define TIM_EventSource_Trigger ((uint16_t)0x0040)
|
|
||||||
// #define TIM_EventSource_Break ((uint16_t)0x0080)
|
|
||||||
// #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
|
|
||||||
|
|
||||||
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow \
|
|
||||||
or the setting of UG bit, or an update generation \
|
|
||||||
through the slave mode controller. */
|
|
||||||
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
|
|
||||||
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
|
|
||||||
((SOURCE) == TIM_UpdateSource_Regular))
|
|
||||||
|
|
||||||
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
|
|
||||||
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
|
|
||||||
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
|
|
||||||
((STATE) == TIM_OCPreload_Disable))
|
|
||||||
|
|
||||||
#define TIM_OCFast_Enable ((uint16_t)0x0004)
|
|
||||||
#define TIM_OCFast_Disable ((uint16_t)0x0000)
|
|
||||||
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
|
|
||||||
((STATE) == TIM_OCFast_Disable))
|
|
||||||
|
|
||||||
#define TIM_OCClear_Enable ((uint16_t)0x0080)
|
|
||||||
#define TIM_OCClear_Disable ((uint16_t)0x0000)
|
|
||||||
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
|
|
||||||
((STATE) == TIM_OCClear_Disable))
|
|
||||||
|
|
||||||
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
|
|
||||||
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
|
|
||||||
#define TIM_TRGOSource_Update ((uint16_t)0x0020)
|
|
||||||
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
|
|
||||||
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
|
|
||||||
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
|
|
||||||
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
|
|
||||||
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
|
|
||||||
//#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_Enable) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_Update) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_OC1) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
|
|
||||||
// ((SOURCE) == TIM_TRGOSource_OC4Ref))
|
|
||||||
|
|
||||||
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
|
|
||||||
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
|
|
||||||
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
|
|
||||||
#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
|
|
||||||
//#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
|
|
||||||
// ((MODE) == TIM_SlaveMode_Gated) || \
|
|
||||||
// ((MODE) == TIM_SlaveMode_Trigger) || \
|
|
||||||
// ((MODE) == TIM_SlaveMode_External1))
|
|
||||||
|
|
||||||
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
|
|
||||||
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
|
|
||||||
//#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
|
|
||||||
// ((STATE) == TIM_MasterSlaveMode_Disable))
|
|
||||||
|
|
||||||
#define TIM2_TIM8_TRGO ((uint16_t)0x0000)
|
|
||||||
#define TIM2_ETH_PTP ((uint16_t)0x0400)
|
|
||||||
#define TIM2_USBFS_SOF ((uint16_t)0x0800)
|
|
||||||
#define TIM2_USBHS_SOF ((uint16_t)0x0C00)
|
|
||||||
|
|
||||||
#define TIM5_GPIO ((uint16_t)0x0000)
|
|
||||||
#define TIM5_LSI ((uint16_t)0x0040)
|
|
||||||
#define TIM5_LSE ((uint16_t)0x0080)
|
|
||||||
#define TIM5_RTC ((uint16_t)0x00C0)
|
|
||||||
|
|
||||||
#define TIM11_GPIO ((uint16_t)0x0000)
|
|
||||||
#define TIM11_HSE ((uint16_t)0x0002)
|
|
||||||
|
|
||||||
class Encoder
|
|
||||||
{
|
|
||||||
private:
|
|
||||||
int _pin;
|
|
||||||
|
|
||||||
public:
|
|
||||||
TIM_TypeDef *tim_base;
|
|
||||||
Encoder();
|
|
||||||
void SetCount(int64_t Counter);
|
|
||||||
uint16_t GetCount();
|
|
||||||
};
|
|
||||||
|
|
||||||
void encoder_config();
|
|
||||||
void encoder2_config(); // Experimental
|
|
||||||
void GpioConfigPortA(GPIO_TypeDef *GPIOx);
|
|
||||||
void GpioConfigPortC(GPIO_TypeDef *GPIOx);
|
|
||||||
void GpioConfigPortD(GPIO_TypeDef *GPIOx);
|
|
||||||
void TIM_EncoderInterConfig(TIM_TypeDef *TIMx, uint16_t TIM_EncoderMode, uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
|
|
||||||
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct);
|
|
||||||
void TIM_TimeBaseInit(TIM_TypeDef *TIMx, TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct);
|
|
||||||
#endif
|
|
||||||
@@ -1,14 +0,0 @@
|
|||||||
#ifndef EXTEND32TO64
|
|
||||||
#define EXTEND32TO54
|
|
||||||
|
|
||||||
#include <Arduino.h>
|
|
||||||
|
|
||||||
class extend32to64
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
int64_t previousTimeValue = 0;
|
|
||||||
const uint64_t ONE_PERIOD = 4294967296; // almost UINT32_MAX;
|
|
||||||
const uint64_t HALF_PERIOD = 2147483648; // Half of that
|
|
||||||
int64_t extendTime(uint32_t in);
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
@@ -1,99 +0,0 @@
|
|||||||
#include "MyENcoder.h"
|
|
||||||
|
|
||||||
MyEncoder::MyEncoder(TIM_TypeDef *_tim_base, uint8_t _indexPin, void irq(void))
|
|
||||||
{
|
|
||||||
tim_base = _tim_base;
|
|
||||||
indexPin = _indexPin;
|
|
||||||
attachInterrupt(digitalPinToInterrupt(indexPin), irq, RISING); // When Index triggered
|
|
||||||
EncoderInit.SetCount(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
#define ONE_PERIOD 65536
|
|
||||||
#define HALF_PERIOD 32768
|
|
||||||
|
|
||||||
int64_t MyEncoder::unwrapEncoder(uint16_t in)
|
|
||||||
{
|
|
||||||
int32_t c32 = (int32_t)in - HALF_PERIOD; // remove half period to determine (+/-) sign of the wrap
|
|
||||||
int32_t dif = (c32 - previousEncoderCounterValue); // core concept: prev + (current - prev) = current
|
|
||||||
|
|
||||||
// wrap difference from -HALF_PERIOD to HALF_PERIOD. modulo prevents differences after the wrap from having an incorrect result
|
|
||||||
int32_t mod_dif = ((dif + HALF_PERIOD) % ONE_PERIOD) - HALF_PERIOD;
|
|
||||||
if (dif < -HALF_PERIOD)
|
|
||||||
mod_dif += ONE_PERIOD; // account for mod of negative number behavior in C
|
|
||||||
|
|
||||||
int64_t unwrapped = previousEncoderCounterValue + mod_dif;
|
|
||||||
previousEncoderCounterValue = unwrapped; // load previous value
|
|
||||||
|
|
||||||
return unwrapped + HALF_PERIOD; // remove the shift we applied at the beginning, and return
|
|
||||||
}
|
|
||||||
|
|
||||||
void MyEncoder::indexPulse(void)
|
|
||||||
{
|
|
||||||
if (pleaseZeroTheCounter)
|
|
||||||
{
|
|
||||||
tim_base->CNT = 0;
|
|
||||||
indexPulseFired = 1;
|
|
||||||
Pos.clear();
|
|
||||||
TDelta.clear();
|
|
||||||
pleaseZeroTheCounter = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t MyEncoder::indexHappened()
|
|
||||||
{
|
|
||||||
if (indexPulseFired)
|
|
||||||
{
|
|
||||||
indexPulseFired = 0;
|
|
||||||
previousEncoderCounterValue = 0;
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
double MyEncoder::currentPos()
|
|
||||||
{
|
|
||||||
curPos = unwrapEncoder(tim_base->CNT) * PosScaleRes;
|
|
||||||
return curPos;
|
|
||||||
}
|
|
||||||
|
|
||||||
double MyEncoder::frequency(uint64_t time)
|
|
||||||
{
|
|
||||||
|
|
||||||
double diffT = 0;
|
|
||||||
double diffPos = 0;
|
|
||||||
double frequency;
|
|
||||||
TDelta.push(time); // Running average over the length of the circular buffer
|
|
||||||
Pos.push(curPos);
|
|
||||||
if (Pos.size() == RINGBUFFERLEN)
|
|
||||||
{
|
|
||||||
diffT = 1.0e-6 * (TDelta.last() - TDelta.first()); // Time is in microseconds
|
|
||||||
diffPos = fabs(Pos.last() - Pos.first());
|
|
||||||
frequency = diffPos / diffT;
|
|
||||||
oldFrequency = frequency;
|
|
||||||
return frequency; // Revolutions per second
|
|
||||||
}
|
|
||||||
else
|
|
||||||
return oldFrequency;
|
|
||||||
}
|
|
||||||
uint8_t MyEncoder::getIndexState()
|
|
||||||
{
|
|
||||||
return digitalRead(indexPin);
|
|
||||||
}
|
|
||||||
|
|
||||||
void MyEncoder::setScale(double scale)
|
|
||||||
{
|
|
||||||
if (CurPosScale != scale && scale != 0)
|
|
||||||
{
|
|
||||||
CurPosScale = scale;
|
|
||||||
PosScaleRes = 1.0 / double(scale);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void MyEncoder::setLatch(uint8_t latchEnable)
|
|
||||||
{
|
|
||||||
if (latchEnable && !oldLatchCEnable) // Should only happen first time IndexCEnable is set
|
|
||||||
{
|
|
||||||
pleaseZeroTheCounter = 1;
|
|
||||||
}
|
|
||||||
oldLatchCEnable = latchEnable;
|
|
||||||
}
|
|
||||||
@@ -1,148 +0,0 @@
|
|||||||
#include <Arduino.h>
|
|
||||||
#include <stdio.h>
|
|
||||||
#include "StepGen.h"
|
|
||||||
|
|
||||||
StepGen::StepGen(TIM_TypeDef *Timer, uint32_t _timerChannel, PinName _stepPin, uint8_t _dirPin, void irq(void))
|
|
||||||
{
|
|
||||||
timerIsRunning = 0;
|
|
||||||
timerStepPosition = 0;
|
|
||||||
timerStepDirection = 0;
|
|
||||||
timerStepPositionAtEnd = 0;
|
|
||||||
timerNewEndStepPosition = 0;
|
|
||||||
actualPosition = 0;
|
|
||||||
requestedPosition = 0;
|
|
||||||
stepsPerMM = 0;
|
|
||||||
enabled = 0;
|
|
||||||
|
|
||||||
dirPin = _dirPin;
|
|
||||||
stepPin = _stepPin;
|
|
||||||
timerChan = _timerChannel;
|
|
||||||
MyTim = new HardwareTimer(Timer);
|
|
||||||
MyTim->attachInterrupt(irq);
|
|
||||||
pinMode(dirPin, OUTPUT);
|
|
||||||
}
|
|
||||||
void StepGen::reqPos(double_t pos)
|
|
||||||
{
|
|
||||||
requestedPosition = pos;
|
|
||||||
}
|
|
||||||
double StepGen::reqPos()
|
|
||||||
{
|
|
||||||
return requestedPosition;
|
|
||||||
}
|
|
||||||
void StepGen::actPos(double pos)
|
|
||||||
{
|
|
||||||
actualPosition = pos;
|
|
||||||
}
|
|
||||||
double StepGen::actPos()
|
|
||||||
{
|
|
||||||
return actualPosition;
|
|
||||||
}
|
|
||||||
|
|
||||||
void StepGen::enable(uint8_t yes)
|
|
||||||
{
|
|
||||||
enabled = yes;
|
|
||||||
}
|
|
||||||
|
|
||||||
void StepGen::handleStepper(void)
|
|
||||||
{
|
|
||||||
if (!enabled)
|
|
||||||
return;
|
|
||||||
pwmCycleTime = StepGen::sync0CycleTime;
|
|
||||||
|
|
||||||
actPos(timerStepPosition / double(stepsPerMM));
|
|
||||||
double diffPosition = reqPos() - actPos();
|
|
||||||
#if 1
|
|
||||||
// Wild "tone" kludge. map() function
|
|
||||||
#define SPEED_MIN 0.00005
|
|
||||||
#define SPEED_MAX 0.0005
|
|
||||||
#define FACT_LOW 1.0
|
|
||||||
#define FACT_HIGH 20.0
|
|
||||||
if (abs(diffPosition) < SPEED_MIN) // 60 mm/min = 0.001 mm/ms
|
|
||||||
{
|
|
||||||
pwmCycleTime = FACT_LOW * StepGen::sync0CycleTime;
|
|
||||||
}
|
|
||||||
else if (abs(diffPosition) > SPEED_MAX) // 60 mm/min = 0.001 mm/ms
|
|
||||||
{
|
|
||||||
pwmCycleTime = FACT_HIGH * StepGen::sync0CycleTime;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
pwmCycleTime = (FACT_LOW + (FACT_HIGH - FACT_LOW) * (abs(diffPosition) - SPEED_MIN) / (SPEED_MAX - SPEED_MIN)) * StepGen::sync0CycleTime;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
uint64_t fre = (abs(diffPosition) * stepsPerMM * 1000000) / pwmCycleTime; // Frequency needed
|
|
||||||
if (fre > maxFreq) // Only do maxFre
|
|
||||||
{
|
|
||||||
double maxDist = (maxFreq * pwmCycleTime) / (stepsPerMM * 1000000.0) * (diffPosition > 0 ? 1 : -1);
|
|
||||||
reqPos(actPos() + maxDist);
|
|
||||||
}
|
|
||||||
int32_t pulsesAtEndOfCycle = stepsPerMM * reqPos();
|
|
||||||
|
|
||||||
// Will be picked up by the timer_CB and the timer is reloaded, if it runs.
|
|
||||||
timerNewEndStepPosition = pulsesAtEndOfCycle;
|
|
||||||
|
|
||||||
if (!timerIsRunning) // Timer isn't running. Start it here
|
|
||||||
{
|
|
||||||
int32_t steps = pulsesAtEndOfCycle - timerStepPosition; // Pulses to go + or -
|
|
||||||
if (steps != 0)
|
|
||||||
{
|
|
||||||
if (steps > 0)
|
|
||||||
{
|
|
||||||
digitalWrite(dirPin, HIGH);
|
|
||||||
timerStepDirection = 1;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
digitalWrite(dirPin, LOW);
|
|
||||||
timerStepDirection = -1;
|
|
||||||
}
|
|
||||||
timerStepPositionAtEnd = pulsesAtEndOfCycle; // Current Position
|
|
||||||
float_t freqf = abs(steps) / (pwmCycleTime*1.0e-6);
|
|
||||||
uint32_t freq = uint32_t(freqf);
|
|
||||||
MyTim->setMode(timerChan, TIMER_OUTPUT_COMPARE_PWM2, stepPin);
|
|
||||||
MyTim->setOverflow(freq, HERTZ_FORMAT);
|
|
||||||
MyTim->setCaptureCompare(timerChan, 50, PERCENT_COMPARE_FORMAT); // 50 %
|
|
||||||
timerIsRunning = 1;
|
|
||||||
MyTim->resume();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
void StepGen::timerCB()
|
|
||||||
{
|
|
||||||
timerStepPosition += timerStepDirection; // The step that was just completed
|
|
||||||
if (timerNewEndStepPosition != 0) // Are we going to reload?
|
|
||||||
{
|
|
||||||
// Input for reload is timerNewEndStepPosition
|
|
||||||
// The timer has current position and from this
|
|
||||||
// can set new frequency and new endtarget for steps
|
|
||||||
MyTim->pause(); // We are not at stop, let's stop it. Note stepPin is floating
|
|
||||||
int32_t steps = timerNewEndStepPosition - timerStepPosition;
|
|
||||||
if (steps != 0)
|
|
||||||
{
|
|
||||||
uint8_t sgn = steps > 0 ? HIGH : LOW;
|
|
||||||
digitalWrite(dirPin, sgn);
|
|
||||||
float_t freqf = abs(steps) / float(pwmCycleTime*1.0e-6);
|
|
||||||
uint32_t freq = uint32_t(freqf);
|
|
||||||
timerStepDirection = steps > 0 ? 1 : -1;
|
|
||||||
timerStepPositionAtEnd = timerNewEndStepPosition;
|
|
||||||
timerNewEndStepPosition = 0; // Set to zero to not reload next time
|
|
||||||
MyTim->setMode(timerChan, TIMER_OUTPUT_COMPARE_PWM2, stepPin);
|
|
||||||
MyTim->setOverflow(freq, HERTZ_FORMAT);
|
|
||||||
MyTim->setCaptureCompare(timerChan, 50, PERCENT_COMPARE_FORMAT); // 50 %
|
|
||||||
MyTim->resume();
|
|
||||||
timerIsRunning = 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (timerStepPosition == timerStepPositionAtEnd) // Are we finished?
|
|
||||||
{
|
|
||||||
timerIsRunning = 0;
|
|
||||||
MyTim->pause();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void StepGen::setScale(int16_t spm)
|
|
||||||
{
|
|
||||||
stepsPerMM = spm;
|
|
||||||
}
|
|
||||||
|
|
||||||
uint32_t StepGen::sync0CycleTime = 0;
|
|
||||||
@@ -1,124 +0,0 @@
|
|||||||
#include <Arduino.h>
|
|
||||||
#include <stdio.h>
|
|
||||||
#include "StepGen2.h"
|
|
||||||
#include "extend32to64.h"
|
|
||||||
|
|
||||||
extern "C"
|
|
||||||
{
|
|
||||||
#include "esc.h"
|
|
||||||
}
|
|
||||||
extern extend32to64 longTime;
|
|
||||||
|
|
||||||
StepGen2::StepGen2(TIM_TypeDef *Timer, uint32_t _timerChannel, PinName _stepPin, uint8_t _dirPin, void irq(void), TIM_TypeDef *Timer2, void irq2(void))
|
|
||||||
{
|
|
||||||
actualPosition = 0;
|
|
||||||
commandedPosition = 0;
|
|
||||||
commandedStepPosition = 0;
|
|
||||||
initialPosition = 0;
|
|
||||||
initialStepPosition = 0;
|
|
||||||
stepsPerMM = 0;
|
|
||||||
enabled = 0;
|
|
||||||
|
|
||||||
dirPin = _dirPin;
|
|
||||||
dirPinName = digitalPinToPinName(dirPin);
|
|
||||||
stepPin = _stepPin;
|
|
||||||
pulseTimerChan = _timerChannel;
|
|
||||||
pulseTimer = new HardwareTimer(Timer);
|
|
||||||
pulseTimer->attachInterrupt(pulseTimerChan, irq); // Capture/compare innterrupt
|
|
||||||
pinMode(dirPin, OUTPUT);
|
|
||||||
startTimer = new HardwareTimer(Timer2);
|
|
||||||
startTimer->attachInterrupt(irq2);
|
|
||||||
}
|
|
||||||
|
|
||||||
uint32_t StepGen2::handleStepper(uint64_t irqTime, uint16_t nLoops)
|
|
||||||
{
|
|
||||||
frequency = 0;
|
|
||||||
nSteps = 0;
|
|
||||||
dbg = 0;
|
|
||||||
if (!enabled) // Just .... don't
|
|
||||||
return updatePos(0);
|
|
||||||
|
|
||||||
commandedStepPosition = floor(commandedPosition * stepsPerMM); // Scale position to steps
|
|
||||||
nSteps = commandedStepPosition - initialStepPosition;
|
|
||||||
if (nSteps == 0) // No movement
|
|
||||||
{
|
|
||||||
return updatePos(1);
|
|
||||||
}
|
|
||||||
lcncCycleTime = nLoops * StepGen2::sync0CycleTime * 1.0e-9; // nLoops is there in case we missed an ethercat cycle. secs
|
|
||||||
|
|
||||||
if (abs(nSteps) < 0) // Some small number
|
|
||||||
{ //
|
|
||||||
frequency = (abs(nSteps) + 1) / lcncCycleTime; // Distribute steps inside available time
|
|
||||||
Tpulses = abs(nSteps) / frequency; //
|
|
||||||
Tstartf = (lcncCycleTime - Tpulses) / 2.0; //
|
|
||||||
} //
|
|
||||||
else // Regular step train, up or down
|
|
||||||
{ //
|
|
||||||
float kTRAJ = (commandedPosition - initialPosition) / lcncCycleTime; // Straight line equation. position = kTRAJ x time + mTRAJ
|
|
||||||
float mTRAJ = initialPosition; // Operating on incoming positions (not steps)
|
|
||||||
if (kTRAJ > 0) //
|
|
||||||
Tstartf = (float(initialStepPosition + 1) / float(stepsPerMM) - mTRAJ) / kTRAJ; // Crossing upwards
|
|
||||||
else //
|
|
||||||
Tstartf = (float(initialStepPosition) / float(stepsPerMM) - mTRAJ) / kTRAJ; // Crossing downwards
|
|
||||||
frequency = fabs(kTRAJ * stepsPerMM); //
|
|
||||||
Tpulses = abs(nSteps) / frequency;
|
|
||||||
}
|
|
||||||
updatePos(5);
|
|
||||||
|
|
||||||
uint32_t timeSinceISR = (longTime.extendTime(micros()) - irqTime); // Diff time from ISR (usecs)
|
|
||||||
dbg = timeSinceISR; //
|
|
||||||
Tstartu = Tjitter + uint32_t(Tstartf * 1e6) - timeSinceISR; // Have already wasted some time since the irq.
|
|
||||||
|
|
||||||
if (nSteps == 0) // Can do this much earlier, but want some calculated data for debugging
|
|
||||||
return updatePos(1);
|
|
||||||
|
|
||||||
timerFrequency = uint32_t(ceil(frequency));
|
|
||||||
startTimer->setOverflow(Tstartu, MICROSEC_FORMAT); // All handled by irqs
|
|
||||||
startTimer->refresh();
|
|
||||||
startTimer->resume();
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
void StepGen2::startTimerCB()
|
|
||||||
{
|
|
||||||
startTimer->pause(); // Once is enough.
|
|
||||||
digitalWriteFast(dirPinName, nSteps < 0 ? HIGH : LOW); // nSteps negative => decrease, HIGH
|
|
||||||
// There will be a short break here for t2 usecs, in the future.
|
|
||||||
|
|
||||||
timerEndPosition += nSteps;
|
|
||||||
pulseTimer->setMode(pulseTimerChan, TIMER_OUTPUT_COMPARE_PWM2, stepPin);
|
|
||||||
pulseTimer->setOverflow(timerFrequency, HERTZ_FORMAT);
|
|
||||||
// pulseTimer->setCaptureCompare(pulseTimerChan, 50, PERCENT_COMPARE_FORMAT);
|
|
||||||
pulseTimer->setCaptureCompare(pulseTimerChan, t3, MICROSEC_COMPARE_FORMAT);
|
|
||||||
pulseTimer->refresh();
|
|
||||||
pulseTimer->resume();
|
|
||||||
}
|
|
||||||
|
|
||||||
void StepGen2::pulseTimerCB()
|
|
||||||
{
|
|
||||||
int16_t dir = digitalReadFast(dirPinName); //
|
|
||||||
if (dir == HIGH) // The step just taken
|
|
||||||
timerPosition--;
|
|
||||||
else
|
|
||||||
timerPosition++;
|
|
||||||
int32_t diffPosition = timerEndPosition - timerPosition; // Same "polarity" as nSteps
|
|
||||||
if (diffPosition == 0)
|
|
||||||
pulseTimer->pause();
|
|
||||||
else
|
|
||||||
{
|
|
||||||
if (diffPosition < 0 && dir == LOW) // Change direction. Should not end up here, but alas
|
|
||||||
digitalWriteFast(dirPinName, HIGH); // Normal is to be HIGH when decreasing
|
|
||||||
if (diffPosition > 0 && dir == HIGH) // Change direction. Should not end up here, but alas
|
|
||||||
digitalWriteFast(dirPinName, LOW); // Normal is to be LOW when increasing
|
|
||||||
// Normally nothing is needed
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
uint32_t StepGen2::updatePos(uint32_t i)
|
|
||||||
{ //
|
|
||||||
initialPosition = commandedPosition; // Save the numeric position for next step
|
|
||||||
initialStepPosition = commandedStepPosition; // also the step we are at}
|
|
||||||
return i;
|
|
||||||
}
|
|
||||||
|
|
||||||
uint32_t StepGen2::sync0CycleTime = 0;
|
|
||||||
File diff suppressed because it is too large
Load Diff
@@ -1,18 +0,0 @@
|
|||||||
#include "extend32to64.h"
|
|
||||||
|
|
||||||
// Extend from 32-bit to 64-bit precision
|
|
||||||
int64_t extend32to64::extendTime(uint32_t in)
|
|
||||||
{
|
|
||||||
int64_t c64 = (int64_t)in - HALF_PERIOD; // remove half period to determine (+/-) sign of the wrap
|
|
||||||
int64_t dif = (c64 - previousTimeValue); // core concept: prev + (current - prev) = current
|
|
||||||
|
|
||||||
// wrap difference from -HALF_PERIOD to HALF_PERIOD. modulo prevents differences after the wrap from having an incorrect result
|
|
||||||
int64_t mod_dif = ((dif + HALF_PERIOD) % ONE_PERIOD) - HALF_PERIOD;
|
|
||||||
if (dif < int64_t(-HALF_PERIOD))
|
|
||||||
mod_dif += ONE_PERIOD; // account for mod of negative number behavior in C
|
|
||||||
|
|
||||||
int64_t unwrapped = previousTimeValue + mod_dif;
|
|
||||||
previousTimeValue = unwrapped; // load previous value
|
|
||||||
|
|
||||||
return unwrapped + HALF_PERIOD; // remove the shift we applied at the beginning, and return
|
|
||||||
}
|
|
||||||
@@ -1,332 +0,0 @@
|
|||||||
#include <Arduino.h>
|
|
||||||
#include <stdio.h>
|
|
||||||
extern "C"
|
|
||||||
{
|
|
||||||
#include "ecat_slv.h"
|
|
||||||
#include "utypes.h"
|
|
||||||
};
|
|
||||||
_Objects Obj;
|
|
||||||
|
|
||||||
HardwareSerial Serial1(PA10, PA9);
|
|
||||||
|
|
||||||
volatile uint16_t ALEventIRQ; // ALEvent that caused the interrupt
|
|
||||||
HardwareTimer *baseTimer; // The base period timer
|
|
||||||
HardwareTimer *syncTimer; // The timer that syncs "with linuxcnc cycle"
|
|
||||||
uint16_t sync0CycleTime; // usecs
|
|
||||||
|
|
||||||
#include "MyEncoder.h"
|
|
||||||
volatile uint16_t encCnt = 0;
|
|
||||||
void indexPulseEncoderCB1(void);
|
|
||||||
MyEncoder Encoder1(TIM2, PA2, indexPulseEncoderCB1);
|
|
||||||
void indexPulseEncoderCB1(void)
|
|
||||||
{
|
|
||||||
encCnt++;
|
|
||||||
Encoder1.indexPulse();
|
|
||||||
}
|
|
||||||
// #include <RunningAverage.h>
|
|
||||||
// RunningAverage irqServeDelays(1000); // To get the max delay of the irq serve time over the last second
|
|
||||||
CircularBuffer<uint16_t, 1000> irqServeDelays;
|
|
||||||
|
|
||||||
#include "StepGen3.h"
|
|
||||||
StepGen3 *Step = 0;
|
|
||||||
|
|
||||||
#include "extend32to64.h"
|
|
||||||
|
|
||||||
volatile uint64_t irqTime = 0, irqCnt = 0;
|
|
||||||
extend32to64 longTime;
|
|
||||||
|
|
||||||
void setFrequencyAdjustedMicrosSeconds(HardwareTimer *timer, uint32_t usecs);
|
|
||||||
|
|
||||||
void cb_set_outputs(void) // Master outputs gets here, slave inputs, first operation
|
|
||||||
{
|
|
||||||
Encoder1.setLatch(Obj.IndexLatchEnable);
|
|
||||||
Encoder1.setScale(2000);
|
|
||||||
}
|
|
||||||
|
|
||||||
volatile uint16_t basePeriodCnt;
|
|
||||||
volatile uint64_t makePulsesCnt = 0, prevMakePulsesCnt = 0;
|
|
||||||
volatile uint16_t deltaMakePulsesCnt;
|
|
||||||
|
|
||||||
volatile double pos_cmd1, pos_cmd2;
|
|
||||||
void syncWithLCNC()
|
|
||||||
{
|
|
||||||
syncTimer->pause();
|
|
||||||
baseTimer->pause();
|
|
||||||
deltaMakePulsesCnt = makePulsesCnt - prevMakePulsesCnt;
|
|
||||||
prevMakePulsesCnt = makePulsesCnt;
|
|
||||||
Step->updateStepGen(pos_cmd1, pos_cmd2); // Update positions
|
|
||||||
Step->makeAllPulses(); // Make first step right here
|
|
||||||
basePeriodCnt = SERVO_PERIOD / BASE_PERIOD; //
|
|
||||||
baseTimer->refresh(); //
|
|
||||||
baseTimer->resume(); // Make the other steps in ISR
|
|
||||||
}
|
|
||||||
|
|
||||||
void basePeriodCB(void)
|
|
||||||
{
|
|
||||||
if (--basePeriodCnt > 0) // Stop
|
|
||||||
Step->makeAllPulses();
|
|
||||||
else
|
|
||||||
baseTimer->pause();
|
|
||||||
}
|
|
||||||
|
|
||||||
int32_t delayT;
|
|
||||||
uint16_t thisCycleTime; // In usecs
|
|
||||||
int16_t maxIrqServeTime = 0;
|
|
||||||
uint64_t oldIrqTime = 0;
|
|
||||||
uint16_t nLoops;
|
|
||||||
|
|
||||||
void handleStepper(void)
|
|
||||||
{
|
|
||||||
if (oldIrqTime != 0) // See if there is a delay in data, normally it *should* be nLoops=1, but sometimes it is more
|
|
||||||
{
|
|
||||||
thisCycleTime = irqTime - oldIrqTime;
|
|
||||||
nLoops = round(float(thisCycleTime) / float(sync0CycleTime));
|
|
||||||
}
|
|
||||||
oldIrqTime = irqTime;
|
|
||||||
|
|
||||||
uint32_t diffT = longTime.extendTime(micros()) - irqTime; // Time from interrupt was received by isr
|
|
||||||
irqServeDelays.push(diffT);
|
|
||||||
if (irqServeDelays.isFull()) // Do max calcs, just waiting a second
|
|
||||||
{
|
|
||||||
uint16_t maxInBuffer = 0;
|
|
||||||
using index_t = decltype(irqServeDelays)::index_t;
|
|
||||||
for (index_t i = 0; i < irqServeDelays.size(); i++)
|
|
||||||
{
|
|
||||||
if (maxInBuffer < irqServeDelays[i])
|
|
||||||
maxInBuffer = irqServeDelays[i];
|
|
||||||
}
|
|
||||||
if (maxIrqServeTime > maxInBuffer) // Reduce by one, slowly eating up excess time
|
|
||||||
maxIrqServeTime--;
|
|
||||||
if (maxIrqServeTime < maxInBuffer)
|
|
||||||
maxIrqServeTime = maxInBuffer;
|
|
||||||
}
|
|
||||||
|
|
||||||
pos_cmd1 = Obj.CommandedPosition1;
|
|
||||||
pos_cmd2 = Obj.CommandedPosition2;
|
|
||||||
|
|
||||||
Obj.ActualPosition1 = Obj.CommandedPosition1;
|
|
||||||
Obj.ActualPosition2 = Obj.CommandedPosition2;
|
|
||||||
|
|
||||||
Step->stepgen_array[0].pos_scale = -Obj.StepsPerMM1;
|
|
||||||
Step->stepgen_array[1].pos_scale = -Obj.StepsPerMM2;
|
|
||||||
|
|
||||||
// Obj.ActualPosition1 = Step->stepgen_array[0].pos_fb;
|
|
||||||
// Obj.ActualPosition2 = Step->stepgen_array[1].pos_fb;
|
|
||||||
|
|
||||||
delayT = maxIrqServeTime - diffT; // Add 10 as some safety margin
|
|
||||||
if (delayT > 0 && delayT < 900)
|
|
||||||
{
|
|
||||||
syncTimer->setOverflow(delayT, MICROSEC_FORMAT); // Work in flawed units, its ok
|
|
||||||
syncTimer->refresh();
|
|
||||||
syncTimer->resume();
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
syncWithLCNC();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
float_t oldCommandedPosition = 0;
|
|
||||||
void cb_get_inputs(void) // Set Master inputs, slave outputs, last operation
|
|
||||||
{
|
|
||||||
Obj.IndexStatus = Encoder1.indexHappened();
|
|
||||||
Obj.EncPos = Encoder1.currentPos();
|
|
||||||
Obj.EncFrequency = Encoder1.frequency(longTime.extendTime(micros()));
|
|
||||||
Obj.IndexByte = Encoder1.getIndexState();
|
|
||||||
|
|
||||||
Obj.DiffT = nLoops;
|
|
||||||
Obj.D1 = 1000 * Obj.CommandedPosition2; // abs(1000 * (ap2 - Obj.CommandedPosition2)); // Step2.actPos();
|
|
||||||
Obj.D2 = 1000 * Obj.ActualPosition2; // Step->stepgen_array[1].pos_fb; // Step->stepgen_array[1].rawcount % INT16_MAX; // Step->stepgen_array[1].freq;
|
|
||||||
Obj.D3 = encCnt % 256; // Step->stepgen_array[1].freq;
|
|
||||||
Obj.D4 = 1000 * (Obj.CommandedPosition2 - oldCommandedPosition); // deltaMakePulsesCnt; // Step->stepgen_array[1].rawcount % UINT16_MAX;
|
|
||||||
oldCommandedPosition = Obj.CommandedPosition2;
|
|
||||||
}
|
|
||||||
|
|
||||||
void ESC_interrupt_enable(uint32_t mask);
|
|
||||||
void ESC_interrupt_disable(uint32_t mask);
|
|
||||||
uint16_t dc_checker(void);
|
|
||||||
void sync0Handler(void);
|
|
||||||
|
|
||||||
static esc_cfg_t config =
|
|
||||||
{
|
|
||||||
.user_arg = NULL,
|
|
||||||
.use_interrupt = 1,
|
|
||||||
.watchdog_cnt = 150,
|
|
||||||
.set_defaults_hook = NULL,
|
|
||||||
.pre_state_change_hook = NULL,
|
|
||||||
.post_state_change_hook = NULL,
|
|
||||||
.application_hook = handleStepper,
|
|
||||||
.safeoutput_override = NULL,
|
|
||||||
.pre_object_download_hook = NULL,
|
|
||||||
.post_object_download_hook = NULL,
|
|
||||||
.rxpdo_override = NULL,
|
|
||||||
.txpdo_override = NULL,
|
|
||||||
.esc_hw_interrupt_enable = ESC_interrupt_enable,
|
|
||||||
.esc_hw_interrupt_disable = ESC_interrupt_disable,
|
|
||||||
.esc_hw_eep_handler = NULL,
|
|
||||||
.esc_check_dc_handler = dc_checker,
|
|
||||||
};
|
|
||||||
|
|
||||||
void measureCrystalFrequency(void);
|
|
||||||
|
|
||||||
volatile byte serveIRQ = 0;
|
|
||||||
|
|
||||||
void setup(void)
|
|
||||||
{
|
|
||||||
Serial1.begin(115200);
|
|
||||||
#if 0
|
|
||||||
measureCrystalFrequency(); // Calibrate crystal frequency
|
|
||||||
#endif
|
|
||||||
Step = new StepGen3;
|
|
||||||
|
|
||||||
encoder_config(); // Needed by encoder, probably breaks some timers.
|
|
||||||
ecat_slv_init(&config);
|
|
||||||
|
|
||||||
pinMode(PA11, OUTPUT); // Step X
|
|
||||||
pinMode(PA12, OUTPUT); // Dir X
|
|
||||||
pinMode(PC9, OUTPUT); // Step Z
|
|
||||||
pinMode(PC10, OUTPUT); // Dir Z
|
|
||||||
|
|
||||||
baseTimer = new HardwareTimer(TIM11); // The base period timer
|
|
||||||
setFrequencyAdjustedMicrosSeconds(baseTimer, BASE_PERIOD / 1000);
|
|
||||||
// baseTimer->setOverflow(BASE_PERIOD / 1000, MICROSEC_FORMAT); // Or the line above, This one is uncalibrated
|
|
||||||
baseTimer->attachInterrupt(basePeriodCB);
|
|
||||||
|
|
||||||
syncTimer = new HardwareTimer(TIM3); // The Linuxcnc servo period sync timer
|
|
||||||
syncTimer->attachInterrupt(syncWithLCNC);
|
|
||||||
}
|
|
||||||
|
|
||||||
void loop(void)
|
|
||||||
{
|
|
||||||
uint64_t dTime;
|
|
||||||
if (serveIRQ)
|
|
||||||
{
|
|
||||||
DIG_process(ALEventIRQ, DIG_PROCESS_WD_FLAG | DIG_PROCESS_OUTPUTS_FLAG |
|
|
||||||
DIG_PROCESS_APP_HOOK_FLAG | DIG_PROCESS_INPUTS_FLAG);
|
|
||||||
serveIRQ = 0;
|
|
||||||
ESCvar.PrevTime = ESCvar.Time;
|
|
||||||
ecat_slv_poll();
|
|
||||||
}
|
|
||||||
dTime = longTime.extendTime(micros()) - irqTime;
|
|
||||||
if (dTime > 5000) // Don't run ecat_slv_poll when expecting to serve interrupt
|
|
||||||
ecat_slv_poll();
|
|
||||||
}
|
|
||||||
|
|
||||||
void sync0Handler(void)
|
|
||||||
{
|
|
||||||
ALEventIRQ = ESC_ALeventread();
|
|
||||||
// if (ALEventIRQ & ESCREG_ALEVENT_SM2)
|
|
||||||
{
|
|
||||||
irqTime = longTime.extendTime(micros());
|
|
||||||
serveIRQ = 1;
|
|
||||||
}
|
|
||||||
irqCnt++; // debug output
|
|
||||||
}
|
|
||||||
|
|
||||||
// Enable SM2 interrupts
|
|
||||||
void ESC_interrupt_enable(uint32_t mask)
|
|
||||||
{
|
|
||||||
// Enable interrupt for SYNC0 or SM2 or SM3
|
|
||||||
// uint32_t user_int_mask = ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM2 | ESCREG_ALEVENT_SM3;
|
|
||||||
uint32_t user_int_mask = ESCREG_ALEVENT_SM2; // Only SM2
|
|
||||||
if (mask & user_int_mask)
|
|
||||||
{
|
|
||||||
ESC_ALeventmaskwrite(ESC_ALeventmaskread() | (mask & user_int_mask));
|
|
||||||
ESC_ALeventmaskwrite(ESC_ALeventmaskread() & ~(ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM3));
|
|
||||||
attachInterrupt(digitalPinToInterrupt(PC3), sync0Handler, RISING);
|
|
||||||
|
|
||||||
// Set LAN9252 interrupt pin driver as push-pull active high
|
|
||||||
uint32_t bits = 0x00000111;
|
|
||||||
ESC_write(0x54, &bits, 4);
|
|
||||||
|
|
||||||
// Enable LAN9252 interrupt
|
|
||||||
bits = 0x00000001;
|
|
||||||
ESC_write(0x5c, &bits, 4);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// Disable SM2 interrupts
|
|
||||||
void ESC_interrupt_disable(uint32_t mask)
|
|
||||||
{
|
|
||||||
// Enable interrupt for SYNC0 or SM2 or SM3
|
|
||||||
// uint32_t user_int_mask = ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM2 | ESCREG_ALEVENT_SM3;
|
|
||||||
uint32_t user_int_mask = ESCREG_ALEVENT_SM2;
|
|
||||||
|
|
||||||
if (mask & user_int_mask)
|
|
||||||
{
|
|
||||||
// Disable interrupt from SYNC0
|
|
||||||
ESC_ALeventmaskwrite(ESC_ALeventmaskread() & ~(mask & user_int_mask));
|
|
||||||
detachInterrupt(digitalPinToInterrupt(PC3));
|
|
||||||
// Disable LAN9252 interrupt
|
|
||||||
uint32_t bits = 0x00000000;
|
|
||||||
ESC_write(0x5c, &bits, 4);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
extern "C" uint32_t ESC_SYNC0cycletime(void);
|
|
||||||
|
|
||||||
// Setup of DC
|
|
||||||
uint16_t dc_checker(void)
|
|
||||||
{
|
|
||||||
// Indicate we run DC
|
|
||||||
ESCvar.dcsync = 1;
|
|
||||||
sync0CycleTime = ESC_SYNC0cycletime() / 1000; // usecs
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// Code to calibrate the crystal.
|
|
||||||
//
|
|
||||||
|
|
||||||
#include <HardwareTimer.h>
|
|
||||||
HardwareTimer *timer;
|
|
||||||
volatile uint32_t cnt;
|
|
||||||
|
|
||||||
void CB(void)
|
|
||||||
{
|
|
||||||
if (cnt-- == 0)
|
|
||||||
{
|
|
||||||
timer->pause();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void setFrequencyAdjustedMicrosSeconds(HardwareTimer *timer, uint32_t usecs)
|
|
||||||
{
|
|
||||||
const uint16_t calibrated1000 = 1042; // <- This is the factor to adjust to make 1 sec = 1 sec
|
|
||||||
uint32_t period_cyc = (usecs * (timer->getTimerClkFreq() / 1000)) / calibrated1000; // Avoid overflow during math
|
|
||||||
uint32_t Prescalerfactor = (period_cyc / 0x10000) + 1;
|
|
||||||
uint32_t PeriodTicks = period_cyc / Prescalerfactor;
|
|
||||||
timer->setPrescaleFactor(Prescalerfactor);
|
|
||||||
timer->setOverflow(PeriodTicks, TICK_FORMAT);
|
|
||||||
// Serial1.printf("Period_cyc=%u Prescalefactor =%u ticks = %u\n", period_cyc, Prescalerfactor, PeriodTicks);
|
|
||||||
}
|
|
||||||
|
|
||||||
void measureCrystalFrequency(void)
|
|
||||||
{
|
|
||||||
timer = new HardwareTimer(TIM1);
|
|
||||||
Serial1.begin(115200);
|
|
||||||
delay(3000);
|
|
||||||
Serial1.printf("Clock freq = %u\n", timer->getTimerClkFreq());
|
|
||||||
setFrequencyAdjustedMicrosSeconds(timer, 1000);
|
|
||||||
timer->refresh();
|
|
||||||
timer->attachInterrupt(CB);
|
|
||||||
cnt = 10000;
|
|
||||||
|
|
||||||
Serial1.printf("\n");
|
|
||||||
uint32_t startT = micros();
|
|
||||||
timer->resume();
|
|
||||||
|
|
||||||
while (cnt != 0)
|
|
||||||
;
|
|
||||||
|
|
||||||
uint32_t endT = micros();
|
|
||||||
uint32_t diffT = endT - startT;
|
|
||||||
Serial1.printf("\n");
|
|
||||||
Serial1.printf("diff = %u\n", diffT);
|
|
||||||
|
|
||||||
Serial1.printf("\n");
|
|
||||||
delay(10000);
|
|
||||||
Serial1.printf("\n");
|
|
||||||
|
|
||||||
exit(0);
|
|
||||||
}
|
|
||||||
14
Kicad/Ax58100-stm32-ethercat/.gitignore
vendored
14
Kicad/Ax58100-stm32-ethercat/.gitignore
vendored
@@ -1,14 +0,0 @@
|
|||||||
AX58100-stm32-ethercat-backups
|
|
||||||
.~lock*
|
|
||||||
fp-info-cache
|
|
||||||
\#auto_saved_file*
|
|
||||||
gerbers/
|
|
||||||
Ax58100-stm32-ethercat-backups/
|
|
||||||
freerouting.*
|
|
||||||
*.dsn
|
|
||||||
*.frb
|
|
||||||
*.rules
|
|
||||||
*.ses
|
|
||||||
|
|
||||||
Ax58100-stm32-ethercat.csv
|
|
||||||
Ax58100-stm32-ethercat.ods
|
|
||||||
File diff suppressed because it is too large
Load Diff
@@ -1,103 +0,0 @@
|
|||||||
(kicad_sch (version 20230121) (generator eeschema)
|
|
||||||
|
|
||||||
(uuid 5597aedc-b607-407f-bbfd-31b3b298ecb1)
|
|
||||||
|
|
||||||
(paper "A4")
|
|
||||||
|
|
||||||
(title_block
|
|
||||||
(title "MetalMusings EaserCAT 3000")
|
|
||||||
)
|
|
||||||
|
|
||||||
(lib_symbols
|
|
||||||
)
|
|
||||||
|
|
||||||
|
|
||||||
(sheet (at 57.15 156.21) (size 93.98 39.37) (fields_autoplaced)
|
|
||||||
(stroke (width 0.1524) (type solid))
|
|
||||||
(fill (color 0 0 0 0.0000))
|
|
||||||
(uuid 0a376a6c-0f15-42f8-81f6-3a55619be267)
|
|
||||||
(property "Sheetname" "Input-Output" (at 57.15 155.4984 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
|
||||||
)
|
|
||||||
(property "Sheetfile" "peripherals.kicad_sch" (at 57.15 196.1646 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left top))
|
|
||||||
)
|
|
||||||
(instances
|
|
||||||
(project "Ax58100-stm32-ethercat"
|
|
||||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "5"))
|
|
||||||
)
|
|
||||||
)
|
|
||||||
)
|
|
||||||
|
|
||||||
(sheet (at 170.18 31.75) (size 101.6 58.42) (fields_autoplaced)
|
|
||||||
(stroke (width 0.1524) (type solid))
|
|
||||||
(fill (color 0 0 0 0.0000))
|
|
||||||
(uuid 5bf93325-f5d9-4344-9bf3-f5fc91bc1622)
|
|
||||||
(property "Sheetname" "AX58100 phys etc" (at 170.18 31.0384 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
|
||||||
)
|
|
||||||
(property "Sheetfile" "AX58100_phy_etc.kicad_sch" (at 170.18 90.7546 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left top))
|
|
||||||
)
|
|
||||||
(instances
|
|
||||||
(project "Ax58100-stm32-ethercat"
|
|
||||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "3"))
|
|
||||||
)
|
|
||||||
)
|
|
||||||
)
|
|
||||||
|
|
||||||
(sheet (at 57.15 31.75) (size 93.98 60.96) (fields_autoplaced)
|
|
||||||
(stroke (width 0.1524) (type solid))
|
|
||||||
(fill (color 0 0 0 0.0000))
|
|
||||||
(uuid 9f485422-734f-43d3-94ea-443cbc453d2e)
|
|
||||||
(property "Sheetname" "AX58100" (at 57.15 31.0384 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
|
||||||
)
|
|
||||||
(property "Sheetfile" "AX48100.kicad_sch" (at 57.15 93.2946 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left top))
|
|
||||||
)
|
|
||||||
(instances
|
|
||||||
(project "Ax58100-stm32-ethercat"
|
|
||||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "2"))
|
|
||||||
)
|
|
||||||
)
|
|
||||||
)
|
|
||||||
|
|
||||||
(sheet (at 171.45 156.21) (size 105.41 39.37) (fields_autoplaced)
|
|
||||||
(stroke (width 0.1524) (type solid))
|
|
||||||
(fill (color 0 0 0 0.0000))
|
|
||||||
(uuid cd91a270-7393-4003-91a3-e42304da540b)
|
|
||||||
(property "Sheetname" "Stepper+encoder" (at 171.45 155.4984 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
|
||||||
)
|
|
||||||
(property "Sheetfile" "Steppers.kicad_sch" (at 171.45 196.1646 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left top))
|
|
||||||
)
|
|
||||||
(instances
|
|
||||||
(project "Ax58100-stm32-ethercat"
|
|
||||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "6"))
|
|
||||||
)
|
|
||||||
)
|
|
||||||
)
|
|
||||||
|
|
||||||
(sheet (at 57.15 106.68) (size 93.98 35.56) (fields_autoplaced)
|
|
||||||
(stroke (width 0.1524) (type solid))
|
|
||||||
(fill (color 0 0 0 0.0000))
|
|
||||||
(uuid d564400f-40ba-4aca-9c2a-14ec52a8353b)
|
|
||||||
(property "Sheetname" "STM32F4" (at 57.15 105.9684 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
|
||||||
)
|
|
||||||
(property "Sheetfile" "STM32F4.kicad_sch" (at 57.15 142.8246 0)
|
|
||||||
(effects (font (size 1.27 1.27)) (justify left top))
|
|
||||||
)
|
|
||||||
(instances
|
|
||||||
(project "Ax58100-stm32-ethercat"
|
|
||||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "4"))
|
|
||||||
)
|
|
||||||
)
|
|
||||||
)
|
|
||||||
|
|
||||||
(sheet_instances
|
|
||||||
(path "/" (page "1"))
|
|
||||||
)
|
|
||||||
)
|
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -9,9 +9,8 @@ Mcu.CPN=STM32F407VGT6
|
|||||||
Mcu.Family=STM32F4
|
Mcu.Family=STM32F4
|
||||||
Mcu.IP0=DAC
|
Mcu.IP0=DAC
|
||||||
Mcu.IP1=I2C2
|
Mcu.IP1=I2C2
|
||||||
Mcu.IP10=TIM5
|
Mcu.IP10=TIM8
|
||||||
Mcu.IP11=TIM9
|
Mcu.IP11=USART1
|
||||||
Mcu.IP12=USART1
|
|
||||||
Mcu.IP2=NVIC
|
Mcu.IP2=NVIC
|
||||||
Mcu.IP3=RCC
|
Mcu.IP3=RCC
|
||||||
Mcu.IP4=SPI1
|
Mcu.IP4=SPI1
|
||||||
@@ -20,44 +19,48 @@ Mcu.IP6=TIM1
|
|||||||
Mcu.IP7=TIM2
|
Mcu.IP7=TIM2
|
||||||
Mcu.IP8=TIM3
|
Mcu.IP8=TIM3
|
||||||
Mcu.IP9=TIM4
|
Mcu.IP9=TIM4
|
||||||
Mcu.IPNb=13
|
Mcu.IPNb=12
|
||||||
Mcu.Name=STM32F407V(E-G)Tx
|
Mcu.Name=STM32F407V(E-G)Tx
|
||||||
Mcu.Package=LQFP100
|
Mcu.Package=LQFP100
|
||||||
Mcu.Pin0=PE5
|
Mcu.Pin0=PA0-WKUP
|
||||||
Mcu.Pin1=PA0-WKUP
|
Mcu.Pin1=PA1
|
||||||
Mcu.Pin10=PB0
|
Mcu.Pin10=PB1
|
||||||
Mcu.Pin11=PB1
|
Mcu.Pin11=PE7
|
||||||
Mcu.Pin12=PE7
|
Mcu.Pin12=PE8
|
||||||
Mcu.Pin13=PE8
|
Mcu.Pin13=PE9
|
||||||
Mcu.Pin14=PE9
|
Mcu.Pin14=PE10
|
||||||
Mcu.Pin15=PE10
|
Mcu.Pin15=PE11
|
||||||
Mcu.Pin16=PE11
|
Mcu.Pin16=PE12
|
||||||
Mcu.Pin17=PE12
|
Mcu.Pin17=PE13
|
||||||
Mcu.Pin18=PE13
|
Mcu.Pin18=PE14
|
||||||
Mcu.Pin19=PE14
|
Mcu.Pin19=PE15
|
||||||
Mcu.Pin2=PA1
|
Mcu.Pin2=PA2
|
||||||
Mcu.Pin20=PE15
|
Mcu.Pin20=PB10
|
||||||
Mcu.Pin21=PB10
|
Mcu.Pin21=PB11
|
||||||
Mcu.Pin22=PB11
|
Mcu.Pin22=PD11
|
||||||
Mcu.Pin23=PD11
|
Mcu.Pin23=PD12
|
||||||
Mcu.Pin24=PD12
|
Mcu.Pin24=PD13
|
||||||
Mcu.Pin25=PC9
|
Mcu.Pin25=PC6
|
||||||
Mcu.Pin26=PA8
|
Mcu.Pin26=PC7
|
||||||
Mcu.Pin27=PA9
|
Mcu.Pin27=PC9
|
||||||
Mcu.Pin28=PA10
|
Mcu.Pin28=PA8
|
||||||
Mcu.Pin29=PA11
|
Mcu.Pin29=PA9
|
||||||
Mcu.Pin3=PA2
|
Mcu.Pin3=PA4
|
||||||
Mcu.Pin30=PA12
|
Mcu.Pin30=PA10
|
||||||
Mcu.Pin31=PC10
|
Mcu.Pin31=PA11
|
||||||
Mcu.Pin32=PB6
|
Mcu.Pin32=PA12
|
||||||
Mcu.Pin33=VP_SYS_VS_Systick
|
Mcu.Pin33=PC10
|
||||||
Mcu.Pin4=PA4
|
Mcu.Pin34=PB4
|
||||||
Mcu.Pin5=PA5
|
Mcu.Pin35=PB5
|
||||||
Mcu.Pin6=PA6
|
Mcu.Pin36=PB6
|
||||||
Mcu.Pin7=PA7
|
Mcu.Pin37=VP_SYS_VS_Systick
|
||||||
Mcu.Pin8=PC4
|
Mcu.Pin4=PA5
|
||||||
Mcu.Pin9=PC5
|
Mcu.Pin5=PA6
|
||||||
Mcu.PinsNb=34
|
Mcu.Pin6=PA7
|
||||||
|
Mcu.Pin7=PC4
|
||||||
|
Mcu.Pin8=PC5
|
||||||
|
Mcu.Pin9=PB0
|
||||||
|
Mcu.PinsNb=38
|
||||||
Mcu.ThirdPartyNb=0
|
Mcu.ThirdPartyNb=0
|
||||||
Mcu.UserConstants=
|
Mcu.UserConstants=
|
||||||
Mcu.UserName=STM32F407VGTx
|
Mcu.UserName=STM32F407VGTx
|
||||||
@@ -81,7 +84,8 @@ PA10.Signal=USART1_RX
|
|||||||
PA11.Signal=S_TIM1_CH4
|
PA11.Signal=S_TIM1_CH4
|
||||||
PA12.Locked=true
|
PA12.Locked=true
|
||||||
PA12.Signal=GPIO_Output
|
PA12.Signal=GPIO_Output
|
||||||
PA2.Signal=S_TIM5_CH3
|
PA2.Locked=true
|
||||||
|
PA2.Signal=GPIO_Input
|
||||||
PA4.Signal=COMP_DAC1_group
|
PA4.Signal=COMP_DAC1_group
|
||||||
PA5.Mode=Full_Duplex_Master
|
PA5.Mode=Full_Duplex_Master
|
||||||
PA5.Signal=SPI1_SCK
|
PA5.Signal=SPI1_SCK
|
||||||
@@ -101,6 +105,8 @@ PB10.Mode=I2C
|
|||||||
PB10.Signal=I2C2_SCL
|
PB10.Signal=I2C2_SCL
|
||||||
PB11.Mode=I2C
|
PB11.Mode=I2C
|
||||||
PB11.Signal=I2C2_SDA
|
PB11.Signal=I2C2_SDA
|
||||||
|
PB4.Signal=S_TIM3_CH1
|
||||||
|
PB5.Signal=S_TIM3_CH2
|
||||||
PB6.Locked=true
|
PB6.Locked=true
|
||||||
PB6.Signal=GPIO_Input
|
PB6.Signal=GPIO_Input
|
||||||
PC10.Locked=true
|
PC10.Locked=true
|
||||||
@@ -109,10 +115,13 @@ PC4.Locked=true
|
|||||||
PC4.Signal=GPIO_Output
|
PC4.Signal=GPIO_Output
|
||||||
PC5.Locked=true
|
PC5.Locked=true
|
||||||
PC5.Signal=GPIO_Input
|
PC5.Signal=GPIO_Input
|
||||||
PC9.Signal=S_TIM3_CH4
|
PC6.Signal=S_TIM8_CH1
|
||||||
|
PC7.Signal=S_TIM8_CH2
|
||||||
|
PC9.Signal=S_TIM8_CH4
|
||||||
PD11.Locked=true
|
PD11.Locked=true
|
||||||
PD11.Signal=GPIO_Input
|
PD11.Signal=GPIO_Input
|
||||||
PD12.Signal=S_TIM4_CH1
|
PD12.Signal=S_TIM4_CH1
|
||||||
|
PD13.Signal=S_TIM4_CH2
|
||||||
PE10.Locked=true
|
PE10.Locked=true
|
||||||
PE10.Signal=GPIO_Output
|
PE10.Signal=GPIO_Output
|
||||||
PE11.Locked=true
|
PE11.Locked=true
|
||||||
@@ -125,7 +134,6 @@ PE14.Locked=true
|
|||||||
PE14.Signal=GPIO_Input
|
PE14.Signal=GPIO_Input
|
||||||
PE15.Locked=true
|
PE15.Locked=true
|
||||||
PE15.Signal=GPIO_Input
|
PE15.Signal=GPIO_Input
|
||||||
PE5.Signal=S_TIM9_CH1
|
|
||||||
PE7.Locked=true
|
PE7.Locked=true
|
||||||
PE7.Signal=GPIO_Output
|
PE7.Signal=GPIO_Output
|
||||||
PE8.Locked=true
|
PE8.Locked=true
|
||||||
@@ -192,14 +200,20 @@ SH.S_TIM2_CH1_ETR.0=TIM2_CH1,Encoder_Interface
|
|||||||
SH.S_TIM2_CH1_ETR.ConfNb=1
|
SH.S_TIM2_CH1_ETR.ConfNb=1
|
||||||
SH.S_TIM2_CH2.0=TIM2_CH2,Encoder_Interface
|
SH.S_TIM2_CH2.0=TIM2_CH2,Encoder_Interface
|
||||||
SH.S_TIM2_CH2.ConfNb=1
|
SH.S_TIM2_CH2.ConfNb=1
|
||||||
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
|
SH.S_TIM3_CH1.0=TIM3_CH1,Encoder_Interface
|
||||||
SH.S_TIM3_CH4.ConfNb=1
|
SH.S_TIM3_CH1.ConfNb=1
|
||||||
SH.S_TIM4_CH1.0=TIM4_CH1,PWM Generation1 CH1
|
SH.S_TIM3_CH2.0=TIM3_CH2,Encoder_Interface
|
||||||
|
SH.S_TIM3_CH2.ConfNb=1
|
||||||
|
SH.S_TIM4_CH1.0=TIM4_CH1,Encoder_Interface
|
||||||
SH.S_TIM4_CH1.ConfNb=1
|
SH.S_TIM4_CH1.ConfNb=1
|
||||||
SH.S_TIM5_CH3.0=TIM5_CH3,Input_Capture3_from_TI3
|
SH.S_TIM4_CH2.0=TIM4_CH2,Encoder_Interface
|
||||||
SH.S_TIM5_CH3.ConfNb=1
|
SH.S_TIM4_CH2.ConfNb=1
|
||||||
SH.S_TIM9_CH1.0=TIM9_CH1,PWM Generation1 CH1
|
SH.S_TIM8_CH1.0=TIM8_CH1,Encoder_Interface
|
||||||
SH.S_TIM9_CH1.ConfNb=1
|
SH.S_TIM8_CH1.ConfNb=1
|
||||||
|
SH.S_TIM8_CH2.0=TIM8_CH2,Encoder_Interface
|
||||||
|
SH.S_TIM8_CH2.ConfNb=1
|
||||||
|
SH.S_TIM8_CH4.0=TIM8_CH4,PWM Generation4 CH4
|
||||||
|
SH.S_TIM8_CH4.ConfNb=1
|
||||||
SPI1.CalculateBaudRate=8.0 MBits/s
|
SPI1.CalculateBaudRate=8.0 MBits/s
|
||||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||||
@@ -207,14 +221,8 @@ SPI1.Mode=SPI_MODE_MASTER
|
|||||||
SPI1.VirtualType=VM_MASTER
|
SPI1.VirtualType=VM_MASTER
|
||||||
TIM1.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
TIM1.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||||
TIM1.IPParameters=Channel-PWM Generation4 CH4
|
TIM1.IPParameters=Channel-PWM Generation4 CH4
|
||||||
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
TIM8.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||||
TIM3.IPParameters=Channel-PWM Generation4 CH4
|
TIM8.IPParameters=Channel-PWM Generation4 CH4
|
||||||
TIM4.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
|
||||||
TIM4.IPParameters=Channel-PWM Generation1 CH1
|
|
||||||
TIM5.Channel-Input_Capture3_from_TI3=TIM_CHANNEL_3
|
|
||||||
TIM5.IPParameters=Channel-Input_Capture3_from_TI3
|
|
||||||
TIM9.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
|
||||||
TIM9.IPParameters=Channel-PWM Generation1 CH1
|
|
||||||
USART1.IPParameters=VirtualMode
|
USART1.IPParameters=VirtualMode
|
||||||
USART1.VirtualMode=VM_ASYNC
|
USART1.VirtualMode=VM_ASYNC
|
||||||
VP_SYS_VS_Systick.Mode=SysTick
|
VP_SYS_VS_Systick.Mode=SysTick
|
||||||
|
Before Width: | Height: | Size: 46 KiB After Width: | Height: | Size: 46 KiB |
|
Before Width: | Height: | Size: 17 KiB After Width: | Height: | Size: 17 KiB |
@@ -1,6 +1,6 @@
|
|||||||
<head>
|
<head>
|
||||||
<meta charset="UTF-8">
|
<meta charset="UTF-8">
|
||||||
<title>🔁 EEPROM Generator | ESI, EEPROM, SOES C code configuration tool</title>
|
<title>🔁 EEPROM Generator | ESI, EEPORM, SOES C code configuration tool</title>
|
||||||
<!--
|
<!--
|
||||||
* SOES EEPROM generator
|
* SOES EEPROM generator
|
||||||
* This tool serves as:
|
* This tool serves as:
|
||||||
@@ -52,13 +52,10 @@
|
|||||||
<option value="INTEGER8">INTEGER8</option>
|
<option value="INTEGER8">INTEGER8</option>
|
||||||
<option value="INTEGER16">INTEGER16</option>
|
<option value="INTEGER16">INTEGER16</option>
|
||||||
<option value="INTEGER32">INTEGER32</option>
|
<option value="INTEGER32">INTEGER32</option>
|
||||||
<option value="INTEGER64">INTEGER64</option>
|
|
||||||
<option value="UNSIGNED8">UNSIGNED8</option>
|
<option value="UNSIGNED8">UNSIGNED8</option>
|
||||||
<option value="UNSIGNED16">UNSIGNED16</option>
|
<option value="UNSIGNED16">UNSIGNED16</option>
|
||||||
<option value="UNSIGNED32">UNSIGNED32</option>
|
<option value="UNSIGNED32">UNSIGNED32</option>
|
||||||
<option value="UNSIGNED64">UNSIGNED64</option>
|
|
||||||
<option value="REAL32">REAL32</option>
|
<option value="REAL32">REAL32</option>
|
||||||
<option value="REAL64">REAL64</option>
|
|
||||||
<option value="VISIBLE_STRING">VISIBLE STRING</option>
|
<option value="VISIBLE_STRING">VISIBLE STRING</option>
|
||||||
</select></td>
|
</select></td>
|
||||||
</tr>
|
</tr>
|
||||||
@@ -415,4 +412,4 @@
|
|||||||
<input id="restoreFileInput" type='file' accept=".json" style="visibility:hidden;" onchange="readFile(event)" />
|
<input id="restoreFileInput" type='file' accept=".json" style="visibility:hidden;" onchange="readFile(event)" />
|
||||||
</form>
|
</form>
|
||||||
</div>
|
</div>
|
||||||
</body>
|
</body>
|
||||||
|
Before Width: | Height: | Size: 1.5 KiB After Width: | Height: | Size: 1.5 KiB |
@@ -28,13 +28,10 @@ const DTYPE = {
|
|||||||
INTEGER8 : 'INTEGER8',
|
INTEGER8 : 'INTEGER8',
|
||||||
INTEGER16 : 'INTEGER16',
|
INTEGER16 : 'INTEGER16',
|
||||||
INTEGER32 : 'INTEGER32',
|
INTEGER32 : 'INTEGER32',
|
||||||
INTEGER64 : 'INTEGER64',
|
|
||||||
UNSIGNED8 : 'UNSIGNED8',
|
UNSIGNED8 : 'UNSIGNED8',
|
||||||
UNSIGNED16 : 'UNSIGNED16',
|
UNSIGNED16 : 'UNSIGNED16',
|
||||||
UNSIGNED32 : 'UNSIGNED32',
|
UNSIGNED32 : 'UNSIGNED32',
|
||||||
UNSIGNED64 : 'UNSIGNED64',
|
|
||||||
REAL32 : 'REAL32',
|
REAL32 : 'REAL32',
|
||||||
REAL64 : 'REAL64',
|
|
||||||
VISIBLE_STRING : 'VISIBLE_STRING',
|
VISIBLE_STRING : 'VISIBLE_STRING',
|
||||||
/* TODO implement missing less common types */
|
/* TODO implement missing less common types */
|
||||||
// OCTET_STRING : 'OCTET_STRING',
|
// OCTET_STRING : 'OCTET_STRING',
|
||||||
@@ -52,13 +49,10 @@ const dtype_bitsize = {
|
|||||||
'INTEGER8' : 8,
|
'INTEGER8' : 8,
|
||||||
'INTEGER16' : 16,
|
'INTEGER16' : 16,
|
||||||
'INTEGER32' : 32,
|
'INTEGER32' : 32,
|
||||||
'INTEGER64' : 64,
|
|
||||||
'UNSIGNED8' : 8,
|
'UNSIGNED8' : 8,
|
||||||
'UNSIGNED16' : 16,
|
'UNSIGNED16' : 16,
|
||||||
'UNSIGNED32' : 32,
|
'UNSIGNED32' : 32,
|
||||||
'UNSIGNED64' : 64,
|
|
||||||
'REAL32' : 32,
|
'REAL32' : 32,
|
||||||
'REAL64' : 64,
|
|
||||||
'VISIBLE_STRING' : 8,
|
'VISIBLE_STRING' : 8,
|
||||||
};
|
};
|
||||||
const booleanPaddingBitsize = 7;
|
const booleanPaddingBitsize = 7;
|
||||||
@@ -68,13 +62,10 @@ const ESI_DT = {
|
|||||||
'INTEGER8': { name: 'SINT', bitsize: 8, ctype: 'int8_t' },
|
'INTEGER8': { name: 'SINT', bitsize: 8, ctype: 'int8_t' },
|
||||||
'INTEGER16': { name: 'INT', bitsize: 16, ctype: 'int16_t' },
|
'INTEGER16': { name: 'INT', bitsize: 16, ctype: 'int16_t' },
|
||||||
'INTEGER32': { name: 'DINT', bitsize: 32, ctype: 'int32_t' },
|
'INTEGER32': { name: 'DINT', bitsize: 32, ctype: 'int32_t' },
|
||||||
'INTEGER64': { name: 'LINT', bitsize: 64, ctype: 'int64_t' },
|
|
||||||
'UNSIGNED8': { name: 'USINT', bitsize: 8, ctype: 'uint8_t' },
|
'UNSIGNED8': { name: 'USINT', bitsize: 8, ctype: 'uint8_t' },
|
||||||
'UNSIGNED16': { name: 'UINT', bitsize: 16, ctype: 'uint16_t' },
|
'UNSIGNED16': { name: 'UINT', bitsize: 16, ctype: 'uint16_t' },
|
||||||
'UNSIGNED32': { name: 'UDINT', bitsize: 32, ctype: 'uint32_t' },
|
'UNSIGNED32': { name: 'UDINT', bitsize: 32, ctype: 'uint32_t' },
|
||||||
'UNSIGNED64': { name: 'ULINT', bitsize: 64, ctype: 'uint64_t' },
|
'REAL32': { name: 'REAL', bitsize: 32, ctype: 'float' }, // TODO check C type name
|
||||||
'REAL32': { name: 'REAL', bitsize: 32, ctype: 'float' },
|
|
||||||
'REAL64': { name: 'LREAL', bitsize: 64, ctype: 'double' },
|
|
||||||
'VISIBLE_STRING': { name: 'STRING', bitsize: 8, ctype: 'char *' }, // TODO check C type name
|
'VISIBLE_STRING': { name: 'STRING', bitsize: 8, ctype: 'char *' }, // TODO check C type name
|
||||||
};
|
};
|
||||||
|
|
||||||
@@ -125,7 +125,7 @@ function objectlist_generator(form, od, indexes)
|
|||||||
objd.items.slice(subindex).forEach(subitem => {
|
objd.items.slice(subindex).forEach(subitem => {
|
||||||
var subi = subindex_padded(subindex);
|
var subi = subindex_padded(subindex);
|
||||||
const value = objectlist_getItemValue(subitem, objd.dtype);
|
const value = objectlist_getItemValue(subitem, objd.dtype);
|
||||||
objectlist += `\n {${subi}, DTYPE_${objd.dtype}, ${bitsize}, ${objectlist_objdFlags(objd)}, acName${index}_${subi}, ${value}, ${subitem.data || 'NULL'}},`;
|
objectlist += `\n {0x${subi}, DTYPE_${objd.dtype}, ${bitsize}, ${objectlist_objdFlags(objd)}, acName${index}_${subi}, ${value}, ${subitem.data || 'NULL'}},`;
|
||||||
subindex++;
|
subindex++;
|
||||||
});
|
});
|
||||||
break;
|
break;
|
||||||
@@ -138,7 +138,7 @@ function objectlist_generator(form, od, indexes)
|
|||||||
const bitsize = dtype_bitsize[subitem.dtype];
|
const bitsize = dtype_bitsize[subitem.dtype];
|
||||||
const value = objectlist_getItemValue(subitem, subitem.dtype);
|
const value = objectlist_getItemValue(subitem, subitem.dtype);
|
||||||
const atypeflag = objectlist_objdFlags(subitem);
|
const atypeflag = objectlist_objdFlags(subitem);
|
||||||
objectlist += `\n {${subi}, DTYPE_${subitem.dtype}, ${bitsize}, ${atypeflag}, acName${index}_${subi}, ${value}, ${subitem.data || 'NULL'}},`;
|
objectlist += `\n {0x${subi}, DTYPE_${subitem.dtype}, ${bitsize}, ${atypeflag}, acName${index}_${subi}, ${value}, ${subitem.data || 'NULL'}},`;
|
||||||
subindex++;
|
subindex++;
|
||||||
});
|
});
|
||||||
|
|
||||||
@@ -3,4 +3,3 @@
|
|||||||
.vscode/c_cpp_properties.json
|
.vscode/c_cpp_properties.json
|
||||||
.vscode/launch.json
|
.vscode/launch.json
|
||||||
.vscode/ipch
|
.vscode/ipch
|
||||||
.vscode/settings.json
|
|
||||||
@@ -8,11 +8,6 @@
|
|||||||
"string": "cpp",
|
"string": "cpp",
|
||||||
"unordered_map": "cpp",
|
"unordered_map": "cpp",
|
||||||
"vector": "cpp",
|
"vector": "cpp",
|
||||||
"system_error": "cpp",
|
"system_error": "cpp"
|
||||||
"numeric": "cpp",
|
}
|
||||||
"ostream": "cpp",
|
|
||||||
"cmath": "cpp"
|
|
||||||
},
|
|
||||||
"C_Cpp.errorSquiggles": "disabled",
|
|
||||||
"cmake.configureOnOpen": false
|
|
||||||
}
|
}
|
||||||
38
Pcb-1-lan9252/Firmware/include/Stepper.h
Executable file
38
Pcb-1-lan9252/Firmware/include/Stepper.h
Executable file
@@ -0,0 +1,38 @@
|
|||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file : main.h
|
||||||
|
* @brief : Header for main.c file.
|
||||||
|
* This file contains the common defines of the application.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2023 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __MAIN_H
|
||||||
|
#define __MAIN_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
void StepperSetup(void);
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f4xx_hal.h"
|
||||||
|
|
||||||
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||||
|
void makePulses(uint32_t totalLength /* µsec */, uint32_t nPulses);
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __MAIN_H */
|
||||||
717
Pcb-1-lan9252/Firmware/include/Stm32F4_Encoder.h
Executable file
717
Pcb-1-lan9252/Firmware/include/Stm32F4_Encoder.h
Executable file
@@ -0,0 +1,717 @@
|
|||||||
|
|
||||||
|
#ifndef __Stm32F4_Encoder_H__
|
||||||
|
#define __Stm32F4_Encoder_H__
|
||||||
|
#include <Arduino.h>
|
||||||
|
|
||||||
|
|
||||||
|
#define GPIO_Speed_50MHz 0x02 /*!< Fast speed */
|
||||||
|
|
||||||
|
//#define GPIO_MODER_MODER0 ((uint32_t)0x00000003)
|
||||||
|
#define GPIO_Mode_OUT 0x01
|
||||||
|
//#define GPIO_OSPEEDER_OSPEEDR0 ((uint32_t)0x00000003)
|
||||||
|
//#define GPIO_OTYPER_OT_0 ((uint32_t)0x00000001)
|
||||||
|
//#define GPIO_PUPDR_PUPDR0 ((uint32_t)0x00000003)
|
||||||
|
|
||||||
|
#define GPIO_PuPd_NOPULL 0x00
|
||||||
|
#define GPIO_Mode_AF 0x02
|
||||||
|
#define GPIO_OType_PP 0x00
|
||||||
|
#define GPIO_PuPd_NOPULL 0x00
|
||||||
|
#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
|
||||||
|
#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
|
||||||
|
#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
|
||||||
|
#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
|
||||||
|
#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
|
||||||
|
#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
|
||||||
|
#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
|
||||||
|
#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
|
||||||
|
#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */
|
||||||
|
#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */
|
||||||
|
#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */
|
||||||
|
#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */
|
||||||
|
#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */
|
||||||
|
#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */
|
||||||
|
#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */
|
||||||
|
#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */
|
||||||
|
#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct TIM_TimeBaseInitTypeDef
|
||||||
|
{
|
||||||
|
uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
|
||||||
|
This parameter can be a number between 0x0000 and 0xFFFF */
|
||||||
|
|
||||||
|
uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
|
||||||
|
This parameter can be a value of @ref TIM_Counter_Mode */
|
||||||
|
|
||||||
|
uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
|
||||||
|
Auto-Reload Register at the next update event.
|
||||||
|
This parameter must be a number between 0x0000 and 0xFFFF. */
|
||||||
|
|
||||||
|
uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
|
||||||
|
This parameter can be a value of @ref TIM_Clock_Division_CKD */
|
||||||
|
|
||||||
|
uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
|
||||||
|
reaches zero, an update event is generated and counting restarts
|
||||||
|
from the RCR value (N).
|
||||||
|
This means in PWM mode that (N+1) corresponds to:
|
||||||
|
- the number of PWM periods in edge-aligned mode
|
||||||
|
- the number of half PWM period in center-aligned mode
|
||||||
|
This parameter must be a number between 0x00 and 0xFF.
|
||||||
|
@note This parameter is valid only for TIM1 and TIM8. */
|
||||||
|
} TIM_TimeBaseInitTypeDef;
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t setcount;
|
||||||
|
|
||||||
|
} encoder;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
|
||||||
|
|
||||||
|
uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_State */
|
||||||
|
|
||||||
|
uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_N_State
|
||||||
|
@note This parameter is valid only for TIM1 and TIM8. */
|
||||||
|
|
||||||
|
uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
|
||||||
|
This parameter can be a number between 0x0000 and 0xFFFF */
|
||||||
|
|
||||||
|
uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
|
||||||
|
|
||||||
|
uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
|
||||||
|
@note This parameter is valid only for TIM1 and TIM8. */
|
||||||
|
|
||||||
|
uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
|
||||||
|
@note This parameter is valid only for TIM1 and TIM8. */
|
||||||
|
|
||||||
|
uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
||||||
|
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
|
||||||
|
@note This parameter is valid only for TIM1 and TIM8. */
|
||||||
|
} TIM_OCInitTypeDef;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
|
||||||
|
uint16_t TIM_Channel; /*!< Specifies the TIM channel.
|
||||||
|
This parameter can be a value of @ref TIM_Channel */
|
||||||
|
|
||||||
|
uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
|
||||||
|
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
|
||||||
|
|
||||||
|
uint16_t TIM_ICSelection; /*!< Specifies the input.
|
||||||
|
This parameter can be a value of @ref TIM_Input_Capture_Selection */
|
||||||
|
|
||||||
|
uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
|
||||||
|
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
|
||||||
|
|
||||||
|
uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
|
||||||
|
This parameter can be a number between 0x0 and 0xF */
|
||||||
|
} TIM_ICInitTypeDef;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
|
||||||
|
uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
|
||||||
|
This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
|
||||||
|
|
||||||
|
uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
|
||||||
|
This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
|
||||||
|
|
||||||
|
uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
|
||||||
|
This parameter can be a value of @ref TIM_Lock_level */
|
||||||
|
|
||||||
|
uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
|
||||||
|
switching-on of the outputs.
|
||||||
|
This parameter can be a number between 0x00 and 0xFF */
|
||||||
|
|
||||||
|
uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
|
||||||
|
This parameter can be a value of @ref TIM_Break_Input_enable_disable */
|
||||||
|
|
||||||
|
uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
|
||||||
|
This parameter can be a value of @ref TIM_Break_Polarity */
|
||||||
|
|
||||||
|
uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
|
||||||
|
This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
|
||||||
|
} TIM_BDTRInitTypeDef;
|
||||||
|
|
||||||
|
|
||||||
|
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||||
|
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||||
|
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||||
|
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||||
|
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||||
|
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||||
|
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||||
|
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||||
|
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||||
|
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||||
|
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||||
|
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||||
|
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||||
|
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||||
|
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||||
|
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||||
|
#define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
|
||||||
|
#define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
|
||||||
|
#define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
|
||||||
|
#define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
|
||||||
|
#define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
|
||||||
|
#define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
|
||||||
|
|
||||||
|
#define TIM4 ((TIM_TypeDef *) TIM4_BASE)
|
||||||
|
#define TIM8 ((TIM_TypeDef *) TIM8_BASE)
|
||||||
|
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
||||||
|
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
||||||
|
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
||||||
|
//#define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
|
||||||
|
//#define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
|
||||||
|
|
||||||
|
#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||||
|
((PERIPH) == TIM2) || \
|
||||||
|
((PERIPH) == TIM3) || \
|
||||||
|
((PERIPH) == TIM4) || \
|
||||||
|
((PERIPH) == TIM5) || \
|
||||||
|
((PERIPH) == TIM6) || \
|
||||||
|
((PERIPH) == TIM7) || \
|
||||||
|
((PERIPH) == TIM8) || \
|
||||||
|
((PERIPH) == TIM9) || \
|
||||||
|
((PERIPH) == TIM10) || \
|
||||||
|
((PERIPH) == TIM11) || \
|
||||||
|
((PERIPH) == TIM12) || \
|
||||||
|
(((PERIPH) == TIM13) || \
|
||||||
|
((PERIPH) == TIM14)))
|
||||||
|
|
||||||
|
#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||||
|
((PERIPH) == TIM2) || \
|
||||||
|
((PERIPH) == TIM3) || \
|
||||||
|
((PERIPH) == TIM4) || \
|
||||||
|
((PERIPH) == TIM5) || \
|
||||||
|
((PERIPH) == TIM8) || \
|
||||||
|
((PERIPH) == TIM9) || \
|
||||||
|
((PERIPH) == TIM10) || \
|
||||||
|
((PERIPH) == TIM11) || \
|
||||||
|
((PERIPH) == TIM12) || \
|
||||||
|
((PERIPH) == TIM13) || \
|
||||||
|
((PERIPH) == TIM14))
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||||
|
((PERIPH) == TIM2) || \
|
||||||
|
((PERIPH) == TIM3) || \
|
||||||
|
((PERIPH) == TIM4) || \
|
||||||
|
((PERIPH) == TIM5) || \
|
||||||
|
((PERIPH) == TIM8) || \
|
||||||
|
((PERIPH) == TIM9) || \
|
||||||
|
((PERIPH) == TIM12))
|
||||||
|
|
||||||
|
#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||||
|
((PERIPH) == TIM2) || \
|
||||||
|
((PERIPH) == TIM3) || \
|
||||||
|
((PERIPH) == TIM4) || \
|
||||||
|
((PERIPH) == TIM5) || \
|
||||||
|
((PERIPH) == TIM8))
|
||||||
|
|
||||||
|
#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||||
|
((PERIPH) == TIM8))
|
||||||
|
|
||||||
|
#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||||
|
((PERIPH) == TIM2) || \
|
||||||
|
((PERIPH) == TIM3) || \
|
||||||
|
((PERIPH) == TIM4) || \
|
||||||
|
((PERIPH) == TIM5) || \
|
||||||
|
((PERIPH) == TIM6) || \
|
||||||
|
((PERIPH) == TIM7) || \
|
||||||
|
((PERIPH) == TIM8))
|
||||||
|
|
||||||
|
#define IS_TIM_LIST6_PERIPH(TIMx)(((TIMx) == TIM2) || \
|
||||||
|
((TIMx) == TIM5) || \
|
||||||
|
((TIMx) == TIM11))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCMode_Timing ((uint16_t)0x0000)
|
||||||
|
#define TIM_OCMode_Active ((uint16_t)0x0010)
|
||||||
|
#define TIM_OCMode_Inactive ((uint16_t)0x0020)
|
||||||
|
#define TIM_OCMode_Toggle ((uint16_t)0x0030)
|
||||||
|
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
|
||||||
|
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
|
||||||
|
//#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||||
|
// ((MODE) == TIM_OCMode_Active) || \
|
||||||
|
// ((MODE) == TIM_OCMode_Inactive) || \
|
||||||
|
// ((MODE) == TIM_OCMode_Toggle)|| \
|
||||||
|
// ((MODE) == TIM_OCMode_PWM1) || \
|
||||||
|
// ((MODE) == TIM_OCMode_PWM2))
|
||||||
|
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||||
|
((MODE) == TIM_OCMode_Active) || \
|
||||||
|
((MODE) == TIM_OCMode_Inactive) || \
|
||||||
|
((MODE) == TIM_OCMode_Toggle)|| \
|
||||||
|
((MODE) == TIM_OCMode_PWM1) || \
|
||||||
|
((MODE) == TIM_OCMode_PWM2) || \
|
||||||
|
((MODE) == TIM_ForcedAction_Active) || \
|
||||||
|
((MODE) == TIM_ForcedAction_InActive))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OPMode_Single ((uint16_t)0x0008)
|
||||||
|
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
|
||||||
|
// ((MODE) == TIM_OPMode_Repetitive))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_Channel_1 ((uint16_t)0x0000)
|
||||||
|
#define TIM_Channel_2 ((uint16_t)0x0004)
|
||||||
|
#define TIM_Channel_3 ((uint16_t)0x0008)
|
||||||
|
#define TIM_Channel_4 ((uint16_t)0x000C)
|
||||||
|
|
||||||
|
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||||
|
((CHANNEL) == TIM_Channel_2) || \
|
||||||
|
((CHANNEL) == TIM_Channel_3) || \
|
||||||
|
((CHANNEL) == TIM_Channel_4))
|
||||||
|
|
||||||
|
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||||
|
((CHANNEL) == TIM_Channel_2))
|
||||||
|
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||||
|
((CHANNEL) == TIM_Channel_2) || \
|
||||||
|
((CHANNEL) == TIM_Channel_3))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
|
||||||
|
#define TIM_CKD_DIV2 ((uint16_t)0x0100)
|
||||||
|
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
|
||||||
|
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
|
||||||
|
((DIV) == TIM_CKD_DIV2) || \
|
||||||
|
((DIV) == TIM_CKD_DIV4))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_CounterMode_Up ((uint16_t)0x0000)
|
||||||
|
#define TIM_CounterMode_Down ((uint16_t)0x0010)
|
||||||
|
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
|
||||||
|
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
|
||||||
|
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
|
||||||
|
//#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
|
||||||
|
// ((MODE) == TIM_CounterMode_Down) || \
|
||||||
|
// ((MODE) == TIM_CounterMode_CenterAligned1) || \
|
||||||
|
// ((MODE) == TIM_CounterMode_CenterAligned2) || \
|
||||||
|
// ((MODE) == TIM_CounterMode_CenterAligned3))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCPolarity_High ((uint16_t)0x0000)
|
||||||
|
#define TIM_OCPolarity_Low ((uint16_t)0x0002)
|
||||||
|
//#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
|
||||||
|
// ((POLARITY) == TIM_OCPolarity_Low))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCNPolarity_High ((uint16_t)0x0000)
|
||||||
|
#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
|
||||||
|
//#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
|
||||||
|
// ((POLARITY) == TIM_OCNPolarity_Low))
|
||||||
|
|
||||||
|
#define TIM_OutputState_Disable ((uint16_t)0x0000)
|
||||||
|
#define TIM_OutputState_Enable ((uint16_t)0x0001)
|
||||||
|
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
|
||||||
|
((STATE) == TIM_OutputState_Enable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OutputNState_Disable ((uint16_t)0x0000)
|
||||||
|
#define TIM_OutputNState_Enable ((uint16_t)0x0004)
|
||||||
|
#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
|
||||||
|
((STATE) == TIM_OutputNState_Enable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_CCx_Enable ((uint16_t)0x0001)
|
||||||
|
#define TIM_CCx_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
|
||||||
|
((CCX) == TIM_CCx_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_CCxN_Enable ((uint16_t)0x0004)
|
||||||
|
#define TIM_CCxN_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
|
||||||
|
((CCXN) == TIM_CCxN_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_Break_Enable ((uint16_t)0x1000)
|
||||||
|
#define TIM_Break_Disable ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
|
||||||
|
// ((STATE) == TIM_Break_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
|
||||||
|
#define TIM_BreakPolarity_High ((uint16_t)0x2000)
|
||||||
|
//#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
|
||||||
|
// ((POLARITY) == TIM_BreakPolarity_High))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
|
||||||
|
#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
|
||||||
|
// ((STATE) == TIM_AutomaticOutput_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
|
||||||
|
#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
|
||||||
|
#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
|
||||||
|
#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
|
||||||
|
//#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
|
||||||
|
// ((LEVEL) == TIM_LOCKLevel_1) || \
|
||||||
|
// ((LEVEL) == TIM_LOCKLevel_2) || \
|
||||||
|
// ((LEVEL) == TIM_LOCKLevel_3))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OSSIState_Enable ((uint16_t)0x0400)
|
||||||
|
#define TIM_OSSIState_Disable ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
|
||||||
|
// ((STATE) == TIM_OSSIState_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OSSRState_Enable ((uint16_t)0x0800)
|
||||||
|
#define TIM_OSSRState_Disable ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
|
||||||
|
// ((STATE) == TIM_OSSRState_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCIdleState_Set ((uint16_t)0x0100)
|
||||||
|
#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
|
||||||
|
// ((STATE) == TIM_OCIdleState_Reset))
|
||||||
|
//
|
||||||
|
|
||||||
|
#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
|
||||||
|
#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
|
||||||
|
// ((STATE) == TIM_OCNIdleState_Reset))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
||||||
|
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
||||||
|
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
|
||||||
|
//#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
||||||
|
// ((POLARITY) == TIM_ICPolarity_Falling)|| \
|
||||||
|
// ((POLARITY) == TIM_ICPolarity_BothEdge))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
||||||
|
connected to IC1, IC2, IC3 or IC4, respectively */
|
||||||
|
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
||||||
|
connected to IC2, IC1, IC4 or IC3, respectively. */
|
||||||
|
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
|
||||||
|
//#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
|
||||||
|
// ((SELECTION) == TIM_ICSelection_IndirectTI) || \
|
||||||
|
// ((SELECTION) == TIM_ICSelection_TRC))
|
||||||
|
|
||||||
|
|
||||||
|
//#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
|
||||||
|
//#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
|
||||||
|
//#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
|
||||||
|
//#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
|
||||||
|
//#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
|
||||||
|
// ((PRESCALER) == TIM_ICPSC_DIV2) || \
|
||||||
|
// ((PRESCALER) == TIM_ICPSC_DIV4) || \
|
||||||
|
// ((PRESCALER) == TIM_ICPSC_DIV8))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_IT_Update ((uint16_t)0x0001)
|
||||||
|
//#define TIM_IT_CC1 ((uint16_t)0x0002)
|
||||||
|
//#define TIM_IT_CC2 ((uint16_t)0x0004)
|
||||||
|
//#define TIM_IT_CC3 ((uint16_t)0x0008)
|
||||||
|
//#define TIM_IT_CC4 ((uint16_t)0x0010)
|
||||||
|
//#define TIM_IT_COM ((uint16_t)0x0020)
|
||||||
|
#define TIM_IT_Trigger ((uint16_t)0x0040)
|
||||||
|
#define TIM_IT_Break ((uint16_t)0x0080)
|
||||||
|
#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
|
||||||
|
|
||||||
|
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
|
||||||
|
((IT) == TIM_IT_CC1) || \
|
||||||
|
((IT) == TIM_IT_CC2) || \
|
||||||
|
((IT) == TIM_IT_CC3) || \
|
||||||
|
((IT) == TIM_IT_CC4) || \
|
||||||
|
((IT) == TIM_IT_COM) || \
|
||||||
|
((IT) == TIM_IT_Trigger) || \
|
||||||
|
((IT) == TIM_IT_Break))
|
||||||
|
|
||||||
|
|
||||||
|
//#define TIM_DMABase_CR1 ((uint16_t)0x0000)
|
||||||
|
//#define TIM_DMABase_CR2 ((uint16_t)0x0001)
|
||||||
|
//#define TIM_DMABase_SMCR ((uint16_t)0x0002)
|
||||||
|
//#define TIM_DMABase_DIER ((uint16_t)0x0003)
|
||||||
|
//#define TIM_DMABase_SR ((uint16_t)0x0004)
|
||||||
|
//#define TIM_DMABase_EGR ((uint16_t)0x0005)
|
||||||
|
//#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
|
||||||
|
//#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
|
||||||
|
//#define TIM_DMABase_CCER ((uint16_t)0x0008)
|
||||||
|
//#define TIM_DMABase_CNT ((uint16_t)0x0009)
|
||||||
|
//#define TIM_DMABase_PSC ((uint16_t)0x000A)
|
||||||
|
//#define TIM_DMABase_ARR ((uint16_t)0x000B)
|
||||||
|
//#define TIM_DMABase_RCR ((uint16_t)0x000C)
|
||||||
|
//#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
|
||||||
|
//#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
|
||||||
|
//#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
|
||||||
|
//#define TIM_DMABase_CCR4 ((uint16_t)0x0010)
|
||||||
|
//#define TIM_DMABase_BDTR ((uint16_t)0x0011)
|
||||||
|
//#define TIM_DMABase_DCR ((uint16_t)0x0012)
|
||||||
|
//#define TIM_DMABase_OR ((uint16_t)0x0013)
|
||||||
|
//#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CR2) || \
|
||||||
|
// ((BASE) == TIM_DMABase_SMCR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_DIER) || \
|
||||||
|
// ((BASE) == TIM_DMABase_SR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_EGR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCMR1) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCMR2) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCER) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CNT) || \
|
||||||
|
// ((BASE) == TIM_DMABase_PSC) || \
|
||||||
|
// ((BASE) == TIM_DMABase_ARR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_RCR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCR1) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCR2) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCR3) || \
|
||||||
|
// ((BASE) == TIM_DMABase_CCR4) || \
|
||||||
|
// ((BASE) == TIM_DMABase_BDTR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_DCR) || \
|
||||||
|
// ((BASE) == TIM_DMABase_OR))
|
||||||
|
|
||||||
|
|
||||||
|
//#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
|
||||||
|
//#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
|
||||||
|
//#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
|
||||||
|
//#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
|
||||||
|
//#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
|
||||||
|
//#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
|
||||||
|
//#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
|
||||||
|
//#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
|
||||||
|
//#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
|
||||||
|
//#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
|
||||||
|
//#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
|
||||||
|
//#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
|
||||||
|
//#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
|
||||||
|
//#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
|
||||||
|
//#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
|
||||||
|
//#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
|
||||||
|
//#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
|
||||||
|
//#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
|
||||||
|
//#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
|
||||||
|
// ((LENGTH) == TIM_DMABurstLength_18Transfers))
|
||||||
|
|
||||||
|
|
||||||
|
//#define TIM_DMA_Update ((uint16_t)0x0100)
|
||||||
|
//#define TIM_DMA_CC1 ((uint16_t)0x0200)
|
||||||
|
//#define TIM_DMA_CC2 ((uint16_t)0x0400)
|
||||||
|
//#define TIM_DMA_CC3 ((uint16_t)0x0800)
|
||||||
|
//#define TIM_DMA_CC4 ((uint16_t)0x1000)
|
||||||
|
//#define TIM_DMA_COM ((uint16_t)0x2000)
|
||||||
|
//#define TIM_DMA_Trigger ((uint16_t)0x4000)
|
||||||
|
//#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
|
||||||
|
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
|
||||||
|
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
|
||||||
|
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
|
||||||
|
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
|
||||||
|
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
|
||||||
|
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
|
||||||
|
((PRESCALER) == TIM_ExtTRGPSC_DIV8))
|
||||||
|
|
||||||
|
|
||||||
|
//#define TIM_TS_ITR0 ((uint16_t)0x0000)
|
||||||
|
//#define TIM_TS_ITR1 ((uint16_t)0x0010)
|
||||||
|
//#define TIM_TS_ITR2 ((uint16_t)0x0020)
|
||||||
|
//#define TIM_TS_ITR3 ((uint16_t)0x0030)
|
||||||
|
//#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
|
||||||
|
//#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
|
||||||
|
//#define TIM_TS_TI2FP2 ((uint16_t)0x0060)
|
||||||
|
//#define TIM_TS_ETRF ((uint16_t)0x0070)
|
||||||
|
//#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||||
|
// ((SELECTION) == TIM_TS_ITR1) || \
|
||||||
|
// ((SELECTION) == TIM_TS_ITR2) || \
|
||||||
|
// ((SELECTION) == TIM_TS_ITR3) || \
|
||||||
|
// ((SELECTION) == TIM_TS_TI1F_ED) || \
|
||||||
|
// ((SELECTION) == TIM_TS_TI1FP1) || \
|
||||||
|
// ((SELECTION) == TIM_TS_TI2FP2) || \
|
||||||
|
// ((SELECTION) == TIM_TS_ETRF))
|
||||||
|
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||||
|
((SELECTION) == TIM_TS_ITR1) || \
|
||||||
|
((SELECTION) == TIM_TS_ITR2) || \
|
||||||
|
((SELECTION) == TIM_TS_ITR3))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
|
||||||
|
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
|
||||||
|
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
|
||||||
|
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
|
||||||
|
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
|
||||||
|
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
|
||||||
|
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
|
||||||
|
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
|
||||||
|
((RELOAD) == TIM_PSCReloadMode_Immediate))
|
||||||
|
|
||||||
|
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
|
||||||
|
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
|
||||||
|
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
|
||||||
|
((ACTION) == TIM_ForcedAction_InActive))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
|
||||||
|
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
|
||||||
|
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
||||||
|
//#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
|
||||||
|
// ((MODE) == TIM_EncoderMode_TI2) || \
|
||||||
|
// ((MODE) == TIM_EncoderMode_TI12))
|
||||||
|
|
||||||
|
|
||||||
|
//#define TIM_EventSource_Update ((uint16_t)0x0001)
|
||||||
|
//#define TIM_EventSource_CC1 ((uint16_t)0x0002)
|
||||||
|
//#define TIM_EventSource_CC2 ((uint16_t)0x0004)
|
||||||
|
//#define TIM_EventSource_CC3 ((uint16_t)0x0008)
|
||||||
|
//#define TIM_EventSource_CC4 ((uint16_t)0x0010)
|
||||||
|
//#define TIM_EventSource_COM ((uint16_t)0x0020)
|
||||||
|
//#define TIM_EventSource_Trigger ((uint16_t)0x0040)
|
||||||
|
//#define TIM_EventSource_Break ((uint16_t)0x0080)
|
||||||
|
//#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
|
||||||
|
or the setting of UG bit, or an update generation
|
||||||
|
through the slave mode controller. */
|
||||||
|
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
|
||||||
|
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
|
||||||
|
((SOURCE) == TIM_UpdateSource_Regular))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
|
||||||
|
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
|
||||||
|
((STATE) == TIM_OCPreload_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCFast_Enable ((uint16_t)0x0004)
|
||||||
|
#define TIM_OCFast_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
|
||||||
|
((STATE) == TIM_OCFast_Disable))
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_OCClear_Enable ((uint16_t)0x0080)
|
||||||
|
#define TIM_OCClear_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
|
||||||
|
((STATE) == TIM_OCClear_Disable))
|
||||||
|
|
||||||
|
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
|
||||||
|
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
|
||||||
|
#define TIM_TRGOSource_Update ((uint16_t)0x0020)
|
||||||
|
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
|
||||||
|
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
|
||||||
|
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
|
||||||
|
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
|
||||||
|
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
|
||||||
|
//#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_Enable) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_Update) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_OC1) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
|
||||||
|
// ((SOURCE) == TIM_TRGOSource_OC4Ref))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
|
||||||
|
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
|
||||||
|
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
|
||||||
|
#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
|
||||||
|
//#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
|
||||||
|
// ((MODE) == TIM_SlaveMode_Gated) || \
|
||||||
|
// ((MODE) == TIM_SlaveMode_Trigger) || \
|
||||||
|
// ((MODE) == TIM_SlaveMode_External1))
|
||||||
|
|
||||||
|
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
|
||||||
|
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
|
||||||
|
//#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
|
||||||
|
// ((STATE) == TIM_MasterSlaveMode_Disable))
|
||||||
|
|
||||||
|
#define TIM2_TIM8_TRGO ((uint16_t)0x0000)
|
||||||
|
#define TIM2_ETH_PTP ((uint16_t)0x0400)
|
||||||
|
#define TIM2_USBFS_SOF ((uint16_t)0x0800)
|
||||||
|
#define TIM2_USBHS_SOF ((uint16_t)0x0C00)
|
||||||
|
|
||||||
|
#define TIM5_GPIO ((uint16_t)0x0000)
|
||||||
|
#define TIM5_LSI ((uint16_t)0x0040)
|
||||||
|
#define TIM5_LSE ((uint16_t)0x0080)
|
||||||
|
#define TIM5_RTC ((uint16_t)0x00C0)
|
||||||
|
|
||||||
|
#define TIM11_GPIO ((uint16_t)0x0000)
|
||||||
|
#define TIM11_HSE ((uint16_t)0x0002)
|
||||||
|
|
||||||
|
|
||||||
|
enum EncTimer {
|
||||||
|
Tim2,
|
||||||
|
Tim3,
|
||||||
|
Tim4,
|
||||||
|
Tim8
|
||||||
|
};
|
||||||
|
|
||||||
|
class Encoder
|
||||||
|
{
|
||||||
|
private:
|
||||||
|
int _pin;
|
||||||
|
|
||||||
|
public:
|
||||||
|
void eattach(int enco);
|
||||||
|
Encoder();
|
||||||
|
void SetCount( enum EncTimer enc, int64_t Counter);
|
||||||
|
uint16_t GetCount( enum EncTimer enc);
|
||||||
|
void attachh(int encoNumber);
|
||||||
|
uint16_t c;
|
||||||
|
};
|
||||||
|
|
||||||
|
void rcc_config();
|
||||||
|
void GpioConfigPortA(GPIO_TypeDef * GPIOx) ;
|
||||||
|
void GpioConfigPortC(GPIO_TypeDef * GPIOx) ;
|
||||||
|
void GpioConfigPortD(GPIO_TypeDef * GPIOx) ;
|
||||||
|
void TIM_EncoderInterConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
|
||||||
|
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
||||||
|
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
||||||
|
#endif
|
||||||
@@ -90,7 +90,7 @@
|
|||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<SubIdx>1</SubIdx>
|
<SubIdx>1</SubIdx>
|
||||||
<Name>IndexLatchEnable</Name>
|
<Name>EncPosScale</Name>
|
||||||
<Type>UDINT</Type>
|
<Type>UDINT</Type>
|
||||||
<BitSize>32</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<BitOffs>16</BitOffs>
|
<BitOffs>16</BitOffs>
|
||||||
@@ -114,79 +114,7 @@
|
|||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<SubIdx>1</SubIdx>
|
<SubIdx>1</SubIdx>
|
||||||
<Name>CommandedPosition1</Name>
|
<Name>IndexLatchEnable</Name>
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1602</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>CommandedPosition2</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1603</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>StepsPerMM1</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1604</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>StepsPerMM2</Name>
|
|
||||||
<Type>UDINT</Type>
|
<Type>UDINT</Type>
|
||||||
<BitSize>32</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<BitOffs>16</BitOffs>
|
<BitOffs>16</BitOffs>
|
||||||
@@ -315,150 +243,6 @@
|
|||||||
</Flags>
|
</Flags>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
</DataType>
|
</DataType>
|
||||||
<DataType>
|
|
||||||
<Name>DT1A05</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>ActualPosition1</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1A06</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>ActualPosition2</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1A07</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>D1</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1A08</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>D2</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1A09</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>D3</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
|
||||||
<Name>DT1A0A</Name>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>0</SubIdx>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Type>USINT</Type>
|
|
||||||
<BitSize>8</BitSize>
|
|
||||||
<BitOffs>0</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<SubIdx>1</SubIdx>
|
|
||||||
<Name>D4</Name>
|
|
||||||
<Type>UDINT</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<BitOffs>16</BitOffs>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</SubItem>
|
|
||||||
</DataType>
|
|
||||||
<DataType>
|
<DataType>
|
||||||
<Name>DT1C00ARR</Name>
|
<Name>DT1C00ARR</Name>
|
||||||
<BaseType>USINT</BaseType>
|
<BaseType>USINT</BaseType>
|
||||||
@@ -494,15 +278,15 @@
|
|||||||
<DataType>
|
<DataType>
|
||||||
<Name>DT1C12ARR</Name>
|
<Name>DT1C12ARR</Name>
|
||||||
<BaseType>UINT</BaseType>
|
<BaseType>UINT</BaseType>
|
||||||
<BitSize>80</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<ArrayInfo>
|
<ArrayInfo>
|
||||||
<LBound>1</LBound>
|
<LBound>1</LBound>
|
||||||
<Elements>5</Elements>
|
<Elements>2</Elements>
|
||||||
</ArrayInfo>
|
</ArrayInfo>
|
||||||
</DataType>
|
</DataType>
|
||||||
<DataType>
|
<DataType>
|
||||||
<Name>DT1C12</Name>
|
<Name>DT1C12</Name>
|
||||||
<BitSize>96</BitSize>
|
<BitSize>48</BitSize>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<SubIdx>0</SubIdx>
|
<SubIdx>0</SubIdx>
|
||||||
<Name>Max SubIndex</Name>
|
<Name>Max SubIndex</Name>
|
||||||
@@ -516,7 +300,7 @@
|
|||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>Elements</Name>
|
<Name>Elements</Name>
|
||||||
<Type>DT1C12ARR</Type>
|
<Type>DT1C12ARR</Type>
|
||||||
<BitSize>80</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<BitOffs>16</BitOffs>
|
<BitOffs>16</BitOffs>
|
||||||
<Flags>
|
<Flags>
|
||||||
<Access>ro</Access>
|
<Access>ro</Access>
|
||||||
@@ -526,15 +310,15 @@
|
|||||||
<DataType>
|
<DataType>
|
||||||
<Name>DT1C13ARR</Name>
|
<Name>DT1C13ARR</Name>
|
||||||
<BaseType>UINT</BaseType>
|
<BaseType>UINT</BaseType>
|
||||||
<BitSize>176</BitSize>
|
<BitSize>80</BitSize>
|
||||||
<ArrayInfo>
|
<ArrayInfo>
|
||||||
<LBound>1</LBound>
|
<LBound>1</LBound>
|
||||||
<Elements>11</Elements>
|
<Elements>5</Elements>
|
||||||
</ArrayInfo>
|
</ArrayInfo>
|
||||||
</DataType>
|
</DataType>
|
||||||
<DataType>
|
<DataType>
|
||||||
<Name>DT1C13</Name>
|
<Name>DT1C13</Name>
|
||||||
<BitSize>192</BitSize>
|
<BitSize>96</BitSize>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<SubIdx>0</SubIdx>
|
<SubIdx>0</SubIdx>
|
||||||
<Name>Max SubIndex</Name>
|
<Name>Max SubIndex</Name>
|
||||||
@@ -548,7 +332,7 @@
|
|||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>Elements</Name>
|
<Name>Elements</Name>
|
||||||
<Type>DT1C13ARR</Type>
|
<Type>DT1C13ARR</Type>
|
||||||
<BitSize>176</BitSize>
|
<BitSize>80</BitSize>
|
||||||
<BitOffs>16</BitOffs>
|
<BitOffs>16</BitOffs>
|
||||||
<Flags>
|
<Flags>
|
||||||
<Access>ro</Access>
|
<Access>ro</Access>
|
||||||
@@ -580,8 +364,8 @@
|
|||||||
<BitSize>32</BitSize>
|
<BitSize>32</BitSize>
|
||||||
</DataType>
|
</DataType>
|
||||||
<DataType>
|
<DataType>
|
||||||
<Name>INT</Name>
|
<Name>DINT</Name>
|
||||||
<BitSize>16</BitSize>
|
<BitSize>32</BitSize>
|
||||||
</DataType>
|
</DataType>
|
||||||
</DataTypes>
|
</DataTypes>
|
||||||
<Objects>
|
<Objects>
|
||||||
@@ -678,7 +462,7 @@
|
|||||||
</Object>
|
</Object>
|
||||||
<Object>
|
<Object>
|
||||||
<Index>#x1600</Index>
|
<Index>#x1600</Index>
|
||||||
<Name>IndexLatchEnable</Name>
|
<Name>EncPosScale</Name>
|
||||||
<Type>DT1600</Type>
|
<Type>DT1600</Type>
|
||||||
<BitSize>48</BitSize>
|
<BitSize>48</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
@@ -689,7 +473,7 @@
|
|||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>IndexLatchEnable</Name>
|
<Name>EncPosScale</Name>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>#x70000020</DefaultValue>
|
<DefaultValue>#x70000020</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
@@ -701,7 +485,7 @@
|
|||||||
</Object>
|
</Object>
|
||||||
<Object>
|
<Object>
|
||||||
<Index>#x1601</Index>
|
<Index>#x1601</Index>
|
||||||
<Name>CommandedPosition1</Name>
|
<Name>IndexLatchEnable</Name>
|
||||||
<Type>DT1601</Type>
|
<Type>DT1601</Type>
|
||||||
<BitSize>48</BitSize>
|
<BitSize>48</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
@@ -712,7 +496,7 @@
|
|||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>CommandedPosition1</Name>
|
<Name>IndexLatchEnable</Name>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>#x70010020</DefaultValue>
|
<DefaultValue>#x70010020</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
@@ -722,75 +506,6 @@
|
|||||||
<Access>ro</Access>
|
<Access>ro</Access>
|
||||||
</Flags>
|
</Flags>
|
||||||
</Object>
|
</Object>
|
||||||
<Object>
|
|
||||||
<Index>#x1602</Index>
|
|
||||||
<Name>CommandedPosition2</Name>
|
|
||||||
<Type>DT1602</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>CommandedPosition2</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x70020020</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1603</Index>
|
|
||||||
<Name>StepsPerMM1</Name>
|
|
||||||
<Type>DT1603</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>StepsPerMM1</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x70030010</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1604</Index>
|
|
||||||
<Name>StepsPerMM2</Name>
|
|
||||||
<Type>DT1604</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>StepsPerMM2</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x70040010</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
<Object>
|
||||||
<Index>#x1A00</Index>
|
<Index>#x1A00</Index>
|
||||||
<Name>EncPos</Name>
|
<Name>EncPos</Name>
|
||||||
@@ -852,7 +567,7 @@
|
|||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>DiffT</Name>
|
<Name>DiffT</Name>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>#x60020010</DefaultValue>
|
<DefaultValue>#x60020020</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
</Info>
|
</Info>
|
||||||
@@ -906,144 +621,6 @@
|
|||||||
<Access>ro</Access>
|
<Access>ro</Access>
|
||||||
</Flags>
|
</Flags>
|
||||||
</Object>
|
</Object>
|
||||||
<Object>
|
|
||||||
<Index>#x1A05</Index>
|
|
||||||
<Name>ActualPosition1</Name>
|
|
||||||
<Type>DT1A05</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>ActualPosition1</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x60050020</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1A06</Index>
|
|
||||||
<Name>ActualPosition2</Name>
|
|
||||||
<Type>DT1A06</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>ActualPosition2</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x60060020</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1A07</Index>
|
|
||||||
<Name>D1</Name>
|
|
||||||
<Type>DT1A07</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>D1</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x60070010</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1A08</Index>
|
|
||||||
<Name>D2</Name>
|
|
||||||
<Type>DT1A08</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>D2</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x60080010</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1A09</Index>
|
|
||||||
<Name>D3</Name>
|
|
||||||
<Type>DT1A09</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>D3</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x60090010</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x1A0A</Index>
|
|
||||||
<Name>D4</Name>
|
|
||||||
<Type>DT1A0A</Type>
|
|
||||||
<BitSize>48</BitSize>
|
|
||||||
<Info>
|
|
||||||
<SubItem>
|
|
||||||
<Name>Max SubIndex</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>1</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>D4</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x600A0010</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
<Object>
|
||||||
<Index>#x1C00</Index>
|
<Index>#x1C00</Index>
|
||||||
<Name>Sync Manager Communication Type</Name>
|
<Name>Sync Manager Communication Type</Name>
|
||||||
@@ -1089,12 +666,12 @@
|
|||||||
<Index>#x1C12</Index>
|
<Index>#x1C12</Index>
|
||||||
<Name>Sync Manager 2 PDO Assignment</Name>
|
<Name>Sync Manager 2 PDO Assignment</Name>
|
||||||
<Type>DT1C12</Type>
|
<Type>DT1C12</Type>
|
||||||
<BitSize>96</BitSize>
|
<BitSize>48</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>Max SubIndex</Name>
|
<Name>Max SubIndex</Name>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>5</DefaultValue>
|
<DefaultValue>2</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
@@ -1109,24 +686,6 @@
|
|||||||
<DefaultValue>#x1601</DefaultValue>
|
<DefaultValue>#x1601</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1602</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1603</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1604</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
</Info>
|
||||||
<Flags>
|
<Flags>
|
||||||
<Access>ro</Access>
|
<Access>ro</Access>
|
||||||
@@ -1136,12 +695,12 @@
|
|||||||
<Index>#x1C13</Index>
|
<Index>#x1C13</Index>
|
||||||
<Name>Sync Manager 3 PDO Assignment</Name>
|
<Name>Sync Manager 3 PDO Assignment</Name>
|
||||||
<Type>DT1C13</Type>
|
<Type>DT1C13</Type>
|
||||||
<BitSize>192</BitSize>
|
<BitSize>96</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
<Name>Max SubIndex</Name>
|
<Name>Max SubIndex</Name>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>11</DefaultValue>
|
<DefaultValue>5</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
<SubItem>
|
||||||
@@ -1174,42 +733,6 @@
|
|||||||
<DefaultValue>#x1A04</DefaultValue>
|
<DefaultValue>#x1A04</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
</SubItem>
|
</SubItem>
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1A05</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1A06</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1A07</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1A08</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1A09</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
<SubItem>
|
|
||||||
<Name>PDO Mapping</Name>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>#x1A0A</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
</SubItem>
|
|
||||||
</Info>
|
</Info>
|
||||||
<Flags>
|
<Flags>
|
||||||
<Access>ro</Access>
|
<Access>ro</Access>
|
||||||
@@ -1244,8 +767,8 @@
|
|||||||
<Object>
|
<Object>
|
||||||
<Index>#x6002</Index>
|
<Index>#x6002</Index>
|
||||||
<Name>DiffT</Name>
|
<Name>DiffT</Name>
|
||||||
<Type>UINT</Type>
|
<Type>UDINT</Type>
|
||||||
<BitSize>16</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>0</DefaultValue>
|
<DefaultValue>0</DefaultValue>
|
||||||
</Info>
|
</Info>
|
||||||
@@ -1280,88 +803,10 @@
|
|||||||
<PdoMapping>T</PdoMapping>
|
<PdoMapping>T</PdoMapping>
|
||||||
</Flags>
|
</Flags>
|
||||||
</Object>
|
</Object>
|
||||||
<Object>
|
|
||||||
<Index>#x6005</Index>
|
|
||||||
<Name>ActualPosition1</Name>
|
|
||||||
<Type>REAL</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>T</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x6006</Index>
|
|
||||||
<Name>ActualPosition2</Name>
|
|
||||||
<Type>REAL</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>T</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x6007</Index>
|
|
||||||
<Name>D1</Name>
|
|
||||||
<Type>INT</Type>
|
|
||||||
<BitSize>16</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>T</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x6008</Index>
|
|
||||||
<Name>D2</Name>
|
|
||||||
<Type>INT</Type>
|
|
||||||
<BitSize>16</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>T</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x6009</Index>
|
|
||||||
<Name>D3</Name>
|
|
||||||
<Type>INT</Type>
|
|
||||||
<BitSize>16</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>T</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x600A</Index>
|
|
||||||
<Name>D4</Name>
|
|
||||||
<Type>INT</Type>
|
|
||||||
<BitSize>16</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>T</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
<Object>
|
||||||
<Index>#x7000</Index>
|
<Index>#x7000</Index>
|
||||||
<Name>IndexLatchEnable</Name>
|
<Name>EncPosScale</Name>
|
||||||
<Type>UDINT</Type>
|
<Type>DINT</Type>
|
||||||
<BitSize>32</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>0</DefaultValue>
|
<DefaultValue>0</DefaultValue>
|
||||||
@@ -1373,8 +818,8 @@
|
|||||||
</Object>
|
</Object>
|
||||||
<Object>
|
<Object>
|
||||||
<Index>#x7001</Index>
|
<Index>#x7001</Index>
|
||||||
<Name>CommandedPosition1</Name>
|
<Name>IndexLatchEnable</Name>
|
||||||
<Type>REAL</Type>
|
<Type>UDINT</Type>
|
||||||
<BitSize>32</BitSize>
|
<BitSize>32</BitSize>
|
||||||
<Info>
|
<Info>
|
||||||
<DefaultValue>0</DefaultValue>
|
<DefaultValue>0</DefaultValue>
|
||||||
@@ -1384,45 +829,6 @@
|
|||||||
<PdoMapping>R</PdoMapping>
|
<PdoMapping>R</PdoMapping>
|
||||||
</Flags>
|
</Flags>
|
||||||
</Object>
|
</Object>
|
||||||
<Object>
|
|
||||||
<Index>#x7002</Index>
|
|
||||||
<Name>CommandedPosition2</Name>
|
|
||||||
<Type>REAL</Type>
|
|
||||||
<BitSize>32</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>R</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x7003</Index>
|
|
||||||
<Name>StepsPerMM1</Name>
|
|
||||||
<Type>INT</Type>
|
|
||||||
<BitSize>16</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>R</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
<Object>
|
|
||||||
<Index>#x7004</Index>
|
|
||||||
<Name>StepsPerMM2</Name>
|
|
||||||
<Type>INT</Type>
|
|
||||||
<BitSize>16</BitSize>
|
|
||||||
<Info>
|
|
||||||
<DefaultValue>0</DefaultValue>
|
|
||||||
</Info>
|
|
||||||
<Flags>
|
|
||||||
<Access>ro</Access>
|
|
||||||
<PdoMapping>R</PdoMapping>
|
|
||||||
</Flags>
|
|
||||||
</Object>
|
|
||||||
</Objects>
|
</Objects>
|
||||||
</Dictionary>
|
</Dictionary>
|
||||||
</Profile>
|
</Profile>
|
||||||
@@ -1435,57 +841,24 @@
|
|||||||
<Sm StartAddress="#x1A00" ControlByte="#x20" Enable="1">Inputs</Sm>
|
<Sm StartAddress="#x1A00" ControlByte="#x20" Enable="1">Inputs</Sm>
|
||||||
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
||||||
<Index>#x1600</Index>
|
<Index>#x1600</Index>
|
||||||
<Name>IndexLatchEnable</Name>
|
<Name>EncPosScale</Name>
|
||||||
<Entry>
|
<Entry>
|
||||||
<Index>#x7000</Index>
|
<Index>#x7000</Index>
|
||||||
<SubIndex>#x0</SubIndex>
|
<SubIndex>#x0</SubIndex>
|
||||||
<BitLen>32</BitLen>
|
<BitLen>32</BitLen>
|
||||||
<Name>IndexLatchEnable</Name>
|
<Name>EncPosScale</Name>
|
||||||
<DataType>UDINT</DataType>
|
<DataType>DINT</DataType>
|
||||||
</Entry>
|
</Entry>
|
||||||
</RxPdo>
|
</RxPdo>
|
||||||
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
||||||
<Index>#x1601</Index>
|
<Index>#x1601</Index>
|
||||||
<Name>CommandedPosition1</Name>
|
<Name>IndexLatchEnable</Name>
|
||||||
<Entry>
|
<Entry>
|
||||||
<Index>#x7001</Index>
|
<Index>#x7001</Index>
|
||||||
<SubIndex>#x0</SubIndex>
|
<SubIndex>#x0</SubIndex>
|
||||||
<BitLen>32</BitLen>
|
<BitLen>32</BitLen>
|
||||||
<Name>CommandedPosition1</Name>
|
<Name>IndexLatchEnable</Name>
|
||||||
<DataType>REAL</DataType>
|
<DataType>UDINT</DataType>
|
||||||
</Entry>
|
|
||||||
</RxPdo>
|
|
||||||
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
|
||||||
<Index>#x1602</Index>
|
|
||||||
<Name>CommandedPosition2</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x7002</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>32</BitLen>
|
|
||||||
<Name>CommandedPosition2</Name>
|
|
||||||
<DataType>REAL</DataType>
|
|
||||||
</Entry>
|
|
||||||
</RxPdo>
|
|
||||||
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
|
||||||
<Index>#x1603</Index>
|
|
||||||
<Name>StepsPerMM1</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x7003</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>16</BitLen>
|
|
||||||
<Name>StepsPerMM1</Name>
|
|
||||||
<DataType>INT</DataType>
|
|
||||||
</Entry>
|
|
||||||
</RxPdo>
|
|
||||||
<RxPdo Fixed="true" Mandatory="true" Sm="2">
|
|
||||||
<Index>#x1604</Index>
|
|
||||||
<Name>StepsPerMM2</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x7004</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>16</BitLen>
|
|
||||||
<Name>StepsPerMM2</Name>
|
|
||||||
<DataType>INT</DataType>
|
|
||||||
</Entry>
|
</Entry>
|
||||||
</RxPdo>
|
</RxPdo>
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
||||||
@@ -1516,9 +889,9 @@
|
|||||||
<Entry>
|
<Entry>
|
||||||
<Index>#x6002</Index>
|
<Index>#x6002</Index>
|
||||||
<SubIndex>#x0</SubIndex>
|
<SubIndex>#x0</SubIndex>
|
||||||
<BitLen>16</BitLen>
|
<BitLen>32</BitLen>
|
||||||
<Name>DiffT</Name>
|
<Name>DiffT</Name>
|
||||||
<DataType>UINT</DataType>
|
<DataType>UDINT</DataType>
|
||||||
</Entry>
|
</Entry>
|
||||||
</TxPdo>
|
</TxPdo>
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
||||||
@@ -1543,72 +916,6 @@
|
|||||||
<DataType>UDINT</DataType>
|
<DataType>UDINT</DataType>
|
||||||
</Entry>
|
</Entry>
|
||||||
</TxPdo>
|
</TxPdo>
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
|
||||||
<Index>#x1A05</Index>
|
|
||||||
<Name>ActualPosition1</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x6005</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>32</BitLen>
|
|
||||||
<Name>ActualPosition1</Name>
|
|
||||||
<DataType>REAL</DataType>
|
|
||||||
</Entry>
|
|
||||||
</TxPdo>
|
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
|
||||||
<Index>#x1A06</Index>
|
|
||||||
<Name>ActualPosition2</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x6006</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>32</BitLen>
|
|
||||||
<Name>ActualPosition2</Name>
|
|
||||||
<DataType>REAL</DataType>
|
|
||||||
</Entry>
|
|
||||||
</TxPdo>
|
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
|
||||||
<Index>#x1A07</Index>
|
|
||||||
<Name>D1</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x6007</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>16</BitLen>
|
|
||||||
<Name>D1</Name>
|
|
||||||
<DataType>INT</DataType>
|
|
||||||
</Entry>
|
|
||||||
</TxPdo>
|
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
|
||||||
<Index>#x1A08</Index>
|
|
||||||
<Name>D2</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x6008</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>16</BitLen>
|
|
||||||
<Name>D2</Name>
|
|
||||||
<DataType>INT</DataType>
|
|
||||||
</Entry>
|
|
||||||
</TxPdo>
|
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
|
||||||
<Index>#x1A09</Index>
|
|
||||||
<Name>D3</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x6009</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>16</BitLen>
|
|
||||||
<Name>D3</Name>
|
|
||||||
<DataType>INT</DataType>
|
|
||||||
</Entry>
|
|
||||||
</TxPdo>
|
|
||||||
<TxPdo Fixed="true" Mandatory="true" Sm="3">
|
|
||||||
<Index>#x1A0A</Index>
|
|
||||||
<Name>D4</Name>
|
|
||||||
<Entry>
|
|
||||||
<Index>#x600A</Index>
|
|
||||||
<SubIndex>#x0</SubIndex>
|
|
||||||
<BitLen>16</BitLen>
|
|
||||||
<Name>D4</Name>
|
|
||||||
<DataType>INT</DataType>
|
|
||||||
</Entry>
|
|
||||||
</TxPdo>
|
|
||||||
<Mailbox DataLinkLayer="true">
|
<Mailbox DataLinkLayer="true">
|
||||||
<CoE SdoInfo="true" PdoAssign="false" PdoConfig="false" PdoUpload="true" CompleteAccess="false" />
|
<CoE SdoInfo="true" PdoAssign="false" PdoConfig="false" PdoUpload="true" CompleteAccess="false" />
|
||||||
</Mailbox>
|
</Mailbox>
|
||||||
|
Before Width: | Height: | Size: 48 KiB After Width: | Height: | Size: 48 KiB |
|
Before Width: | Height: | Size: 58 KiB After Width: | Height: | Size: 58 KiB |
@@ -33,8 +33,8 @@
|
|||||||
#define SM3_smc 0x20
|
#define SM3_smc 0x20
|
||||||
#define SM3_act 1
|
#define SM3_act 1
|
||||||
|
|
||||||
#define MAX_MAPPINGS_SM2 5
|
#define MAX_MAPPINGS_SM2 2
|
||||||
#define MAX_MAPPINGS_SM3 11
|
#define MAX_MAPPINGS_SM3 5
|
||||||
|
|
||||||
#define MAX_RXPDO_SIZE 512
|
#define MAX_RXPDO_SIZE 512
|
||||||
#define MAX_TXPDO_SIZE 512
|
#define MAX_TXPDO_SIZE 512
|
||||||
@@ -13,25 +13,25 @@
|
|||||||
#define IS_TXPDO(index) ((index) >= 0x1A00 && (index) < 0x1C00)
|
#define IS_TXPDO(index) ((index) >= 0x1A00 && (index) < 0x1C00)
|
||||||
|
|
||||||
/* Global variables used by the stack */
|
/* Global variables used by the stack */
|
||||||
uint8_t MBX[MBXBUFFERS * MAX(MBXSIZE, MBXSIZEBOOT)];
|
uint8_t MBX[MBXBUFFERS * MAX(MBXSIZE,MBXSIZEBOOT)];
|
||||||
_MBXcontrol MBXcontrol[MBXBUFFERS];
|
_MBXcontrol MBXcontrol[MBXBUFFERS];
|
||||||
_SMmap SMmap2[MAX_MAPPINGS_SM2];
|
_SMmap SMmap2[MAX_MAPPINGS_SM2];
|
||||||
_SMmap SMmap3[MAX_MAPPINGS_SM3];
|
_SMmap SMmap3[MAX_MAPPINGS_SM3];
|
||||||
_ESCvar ESCvar;
|
_ESCvar ESCvar;
|
||||||
|
|
||||||
/* Private variables */
|
/* Private variables */
|
||||||
static volatile int watchdog;
|
static volatile int watchdog;
|
||||||
|
|
||||||
#if MAX_MAPPINGS_SM2 > 0
|
#if MAX_MAPPINGS_SM2 > 0
|
||||||
static uint8_t rxpdo[MAX_RXPDO_SIZE] __attribute__((aligned(8)));
|
static uint8_t rxpdo[MAX_RXPDO_SIZE] __attribute__((aligned (8)));
|
||||||
#else
|
#else
|
||||||
extern uint8_t *rxpdo;
|
extern uint8_t * rxpdo;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if MAX_MAPPINGS_SM3 > 0
|
#if MAX_MAPPINGS_SM3 > 0
|
||||||
static uint8_t txpdo[MAX_TXPDO_SIZE] __attribute__((aligned(8)));
|
static uint8_t txpdo[MAX_TXPDO_SIZE] __attribute__((aligned (8)));
|
||||||
#else
|
#else
|
||||||
extern uint8_t *txpdo;
|
extern uint8_t * txpdo;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/** Function to pre-qualify the incoming SDO download.
|
/** Function to pre-qualify the incoming SDO download.
|
||||||
@@ -40,19 +40,19 @@ extern uint8_t *txpdo;
|
|||||||
* @param[in] sub-index = sub-index of SDO download request to check
|
* @param[in] sub-index = sub-index of SDO download request to check
|
||||||
* @return SDO abort code, or 0 on success
|
* @return SDO abort code, or 0 on success
|
||||||
*/
|
*/
|
||||||
uint32_t ESC_download_pre_objecthandler(uint16_t index,
|
uint32_t ESC_download_pre_objecthandler (uint16_t index,
|
||||||
uint8_t subindex,
|
uint8_t subindex,
|
||||||
void *data,
|
void * data,
|
||||||
size_t size,
|
size_t size,
|
||||||
uint16_t flags)
|
uint16_t flags)
|
||||||
{
|
{
|
||||||
if (IS_RXPDO(index) ||
|
if (IS_RXPDO (index) ||
|
||||||
IS_TXPDO(index) ||
|
IS_TXPDO (index) ||
|
||||||
index == RX_PDO_OBJIDX ||
|
index == RX_PDO_OBJIDX ||
|
||||||
index == TX_PDO_OBJIDX)
|
index == TX_PDO_OBJIDX)
|
||||||
{
|
{
|
||||||
uint8_t minSub = ((flags & COMPLETE_ACCESS_FLAG) == 0) ? 0 : 1;
|
uint8_t minSub = ((flags & COMPLETE_ACCESS_FLAG) == 0) ? 0 : 1;
|
||||||
if (subindex > minSub && COE_maxSub(index) != 0)
|
if (subindex > minSub && COE_maxSub (index) != 0)
|
||||||
{
|
{
|
||||||
return ABORT_SUBINDEX0_NOT_ZERO;
|
return ABORT_SUBINDEX0_NOT_ZERO;
|
||||||
}
|
}
|
||||||
@@ -60,11 +60,11 @@ uint32_t ESC_download_pre_objecthandler(uint16_t index,
|
|||||||
|
|
||||||
if (ESCvar.pre_object_download_hook)
|
if (ESCvar.pre_object_download_hook)
|
||||||
{
|
{
|
||||||
return (ESCvar.pre_object_download_hook)(index,
|
return (ESCvar.pre_object_download_hook) (index,
|
||||||
subindex,
|
subindex,
|
||||||
data,
|
data,
|
||||||
size,
|
size,
|
||||||
flags);
|
flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@@ -77,7 +77,7 @@ uint32_t ESC_download_pre_objecthandler(uint16_t index,
|
|||||||
* @param[in] sub-index = sub-index of SDO download request to handle
|
* @param[in] sub-index = sub-index of SDO download request to handle
|
||||||
* @return SDO abort code, or 0 on success
|
* @return SDO abort code, or 0 on success
|
||||||
*/
|
*/
|
||||||
uint32_t ESC_download_post_objecthandler(uint16_t index, uint8_t subindex, uint16_t flags)
|
uint32_t ESC_download_post_objecthandler (uint16_t index, uint8_t subindex, uint16_t flags)
|
||||||
{
|
{
|
||||||
if (ESCvar.post_object_download_hook != NULL)
|
if (ESCvar.post_object_download_hook != NULL)
|
||||||
{
|
{
|
||||||
@@ -93,19 +93,19 @@ uint32_t ESC_download_post_objecthandler(uint16_t index, uint8_t subindex, uint1
|
|||||||
* @param[in] sub-index = sub-index of SDO upload request to handle
|
* @param[in] sub-index = sub-index of SDO upload request to handle
|
||||||
* @return SDO abort code, or 0 on success
|
* @return SDO abort code, or 0 on success
|
||||||
*/
|
*/
|
||||||
uint32_t ESC_upload_pre_objecthandler(uint16_t index,
|
uint32_t ESC_upload_pre_objecthandler (uint16_t index,
|
||||||
uint8_t subindex,
|
uint8_t subindex,
|
||||||
void *data,
|
void * data,
|
||||||
size_t size,
|
size_t size,
|
||||||
uint16_t flags)
|
uint16_t flags)
|
||||||
{
|
{
|
||||||
if (ESCvar.pre_object_upload_hook != NULL)
|
if (ESCvar.pre_object_upload_hook != NULL)
|
||||||
{
|
{
|
||||||
return (ESCvar.pre_object_upload_hook)(index,
|
return (ESCvar.pre_object_upload_hook) (index,
|
||||||
subindex,
|
subindex,
|
||||||
data,
|
data,
|
||||||
size,
|
size,
|
||||||
flags);
|
flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@@ -118,7 +118,7 @@ uint32_t ESC_upload_pre_objecthandler(uint16_t index,
|
|||||||
* @param[in] sub-index = sub-index of SDO upload request to handle
|
* @param[in] sub-index = sub-index of SDO upload request to handle
|
||||||
* @return SDO abort code, or 0 on success
|
* @return SDO abort code, or 0 on success
|
||||||
*/
|
*/
|
||||||
uint32_t ESC_upload_post_objecthandler(uint16_t index, uint8_t subindex, uint16_t flags)
|
uint32_t ESC_upload_post_objecthandler (uint16_t index, uint8_t subindex, uint16_t flags)
|
||||||
{
|
{
|
||||||
if (ESCvar.post_object_upload_hook != NULL)
|
if (ESCvar.post_object_upload_hook != NULL)
|
||||||
{
|
{
|
||||||
@@ -131,11 +131,11 @@ uint32_t ESC_upload_post_objecthandler(uint16_t index, uint8_t subindex, uint16_
|
|||||||
/** Hook called from the slave stack ESC_stopoutputs to act on state changes
|
/** Hook called from the slave stack ESC_stopoutputs to act on state changes
|
||||||
* forcing us to stop outputs. Here we can set them to a safe state.
|
* forcing us to stop outputs. Here we can set them to a safe state.
|
||||||
*/
|
*/
|
||||||
void APP_safeoutput(void)
|
void APP_safeoutput (void)
|
||||||
{
|
{
|
||||||
DPRINT("APP_safeoutput\n");
|
DPRINT ("APP_safeoutput\n");
|
||||||
|
|
||||||
if (ESCvar.safeoutput_override != NULL)
|
if(ESCvar.safeoutput_override != NULL)
|
||||||
{
|
{
|
||||||
(ESCvar.safeoutput_override)();
|
(ESCvar.safeoutput_override)();
|
||||||
}
|
}
|
||||||
@@ -143,9 +143,9 @@ void APP_safeoutput(void)
|
|||||||
|
|
||||||
/** Write local process data to Sync Manager 3, Master Inputs.
|
/** Write local process data to Sync Manager 3, Master Inputs.
|
||||||
*/
|
*/
|
||||||
void TXPDO_update(void)
|
void TXPDO_update (void)
|
||||||
{
|
{
|
||||||
if (ESCvar.txpdo_override != NULL)
|
if(ESCvar.txpdo_override != NULL)
|
||||||
{
|
{
|
||||||
(ESCvar.txpdo_override)();
|
(ESCvar.txpdo_override)();
|
||||||
}
|
}
|
||||||
@@ -153,26 +153,26 @@ void TXPDO_update(void)
|
|||||||
{
|
{
|
||||||
if (MAX_MAPPINGS_SM3 > 0)
|
if (MAX_MAPPINGS_SM3 > 0)
|
||||||
{
|
{
|
||||||
COE_pdoPack(txpdo, ESCvar.sm3mappings, SMmap3);
|
COE_pdoPack (txpdo, ESCvar.sm3mappings, SMmap3);
|
||||||
}
|
}
|
||||||
ESC_write(ESC_SM3_sma, txpdo, ESCvar.ESC_SM3_sml);
|
ESC_write (ESC_SM3_sma, txpdo, ESCvar.ESC_SM3_sml);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/** Read Sync Manager 2 to local process data, Master Outputs.
|
/** Read Sync Manager 2 to local process data, Master Outputs.
|
||||||
*/
|
*/
|
||||||
void RXPDO_update(void)
|
void RXPDO_update (void)
|
||||||
{
|
{
|
||||||
if (ESCvar.rxpdo_override != NULL)
|
if(ESCvar.rxpdo_override != NULL)
|
||||||
{
|
{
|
||||||
(ESCvar.rxpdo_override)();
|
(ESCvar.rxpdo_override)();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
ESC_read(ESC_SM2_sma, rxpdo, ESCvar.ESC_SM2_sml);
|
ESC_read (ESC_SM2_sma, rxpdo, ESCvar.ESC_SM2_sml);
|
||||||
if (MAX_MAPPINGS_SM2 > 0)
|
if (MAX_MAPPINGS_SM2 > 0)
|
||||||
{
|
{
|
||||||
COE_pdoUnpack(rxpdo, ESCvar.sm2mappings, SMmap2);
|
COE_pdoUnpack (rxpdo, ESCvar.sm2mappings, SMmap2);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -182,7 +182,7 @@ void RXPDO_update(void)
|
|||||||
*
|
*
|
||||||
* @param[in] watchdogcnt = new watchdog count value
|
* @param[in] watchdogcnt = new watchdog count value
|
||||||
*/
|
*/
|
||||||
void APP_setwatchdog(int watchdogcnt)
|
void APP_setwatchdog (int watchdogcnt)
|
||||||
{
|
{
|
||||||
CC_ATOMIC_SET(ESCvar.watchdogcnt, watchdogcnt);
|
CC_ATOMIC_SET(ESCvar.watchdogcnt, watchdogcnt);
|
||||||
}
|
}
|
||||||
@@ -191,11 +191,10 @@ void APP_setwatchdog(int watchdogcnt)
|
|||||||
* write ethercat inputs. Implement watch-dog counter to count-out if we have
|
* write ethercat inputs. Implement watch-dog counter to count-out if we have
|
||||||
* made state change affecting the App.state.
|
* made state change affecting the App.state.
|
||||||
*/
|
*/
|
||||||
|
void DIG_process (uint8_t flags)
|
||||||
void DIG_process(uint16_t ALEvent, uint8_t flags)
|
|
||||||
{
|
{
|
||||||
/* Handle watchdog */
|
/* Handle watchdog */
|
||||||
if ((flags & DIG_PROCESS_WD_FLAG) > 0)
|
if((flags & DIG_PROCESS_WD_FLAG) > 0)
|
||||||
{
|
{
|
||||||
if (CC_ATOMIC_GET(watchdog) > 0)
|
if (CC_ATOMIC_GET(watchdog) > 0)
|
||||||
{
|
{
|
||||||
@@ -208,7 +207,7 @@ void DIG_process(uint16_t ALEvent, uint8_t flags)
|
|||||||
DPRINT("DIG_process watchdog expired\n");
|
DPRINT("DIG_process watchdog expired\n");
|
||||||
ESC_ALstatusgotoerror((ESCsafeop | ESCerror), ALERR_WATCHDOG);
|
ESC_ALstatusgotoerror((ESCsafeop | ESCerror), ALERR_WATCHDOG);
|
||||||
}
|
}
|
||||||
else if (((CC_ATOMIC_GET(ESCvar.App.state) & APPSTATE_OUTPUT) == 0))
|
else if(((CC_ATOMIC_GET(ESCvar.App.state) & APPSTATE_OUTPUT) == 0))
|
||||||
{
|
{
|
||||||
CC_ATOMIC_SET(watchdog, ESCvar.watchdogcnt);
|
CC_ATOMIC_SET(watchdog, ESCvar.watchdogcnt);
|
||||||
}
|
}
|
||||||
@@ -217,15 +216,15 @@ void DIG_process(uint16_t ALEvent, uint8_t flags)
|
|||||||
/* Handle Outputs */
|
/* Handle Outputs */
|
||||||
if ((flags & DIG_PROCESS_OUTPUTS_FLAG) > 0)
|
if ((flags & DIG_PROCESS_OUTPUTS_FLAG) > 0)
|
||||||
{
|
{
|
||||||
if (((CC_ATOMIC_GET(ESCvar.App.state) & APPSTATE_OUTPUT) > 0) &&
|
if(((CC_ATOMIC_GET(ESCvar.App.state) & APPSTATE_OUTPUT) > 0) &&
|
||||||
(ALEvent & ESCREG_ALEVENT_SM2))
|
(ESCvar.ALevent & ESCREG_ALEVENT_SM2))
|
||||||
{
|
{
|
||||||
RXPDO_update();
|
RXPDO_update();
|
||||||
CC_ATOMIC_SET(watchdog, ESCvar.watchdogcnt);
|
CC_ATOMIC_SET(watchdog, ESCvar.watchdogcnt);
|
||||||
/* Set outputs */
|
/* Set outputs */
|
||||||
cb_set_outputs();
|
cb_set_outputs();
|
||||||
}
|
}
|
||||||
else if (ALEvent & ESCREG_ALEVENT_SM2)
|
else if (ESCvar.ALevent & ESCREG_ALEVENT_SM2)
|
||||||
{
|
{
|
||||||
RXPDO_update();
|
RXPDO_update();
|
||||||
}
|
}
|
||||||
@@ -244,7 +243,7 @@ void DIG_process(uint16_t ALEvent, uint8_t flags)
|
|||||||
/* Handle Inputs */
|
/* Handle Inputs */
|
||||||
if ((flags & DIG_PROCESS_INPUTS_FLAG) > 0)
|
if ((flags & DIG_PROCESS_INPUTS_FLAG) > 0)
|
||||||
{
|
{
|
||||||
if (CC_ATOMIC_GET(ESCvar.App.state) > 0)
|
if(CC_ATOMIC_GET(ESCvar.App.state) > 0)
|
||||||
{
|
{
|
||||||
/* Update inputs */
|
/* Update inputs */
|
||||||
cb_get_inputs();
|
cb_get_inputs();
|
||||||
@@ -258,7 +257,7 @@ void DIG_process(uint16_t ALEvent, uint8_t flags)
|
|||||||
* control what interrupts that should be served and re-activated with
|
* control what interrupts that should be served and re-activated with
|
||||||
* event mask argument
|
* event mask argument
|
||||||
*/
|
*/
|
||||||
void ecat_slv_worker(uint32_t event_mask)
|
void ecat_slv_worker (uint32_t event_mask)
|
||||||
{
|
{
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
@@ -290,21 +289,21 @@ void ecat_slv_worker(uint32_t event_mask)
|
|||||||
|
|
||||||
CC_ATOMIC_SET(ESCvar.ALevent, ESC_ALeventread());
|
CC_ATOMIC_SET(ESCvar.ALevent, ESC_ALeventread());
|
||||||
|
|
||||||
} while (ESCvar.ALevent & event_mask);
|
}while(ESCvar.ALevent & event_mask);
|
||||||
|
|
||||||
ESC_ALeventmaskwrite(ESC_ALeventmaskread() | event_mask);
|
ESC_ALeventmaskwrite(ESC_ALeventmaskread() | event_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Polling function. It should be called periodically for an application
|
* Polling function. It should be called periodically for an application
|
||||||
* when only SM2/DC interrupt is active.
|
* when only SM2/DC interrupt is active.
|
||||||
* Read and handle events for the EtherCAT state, status, mailbox and eeprom.
|
* Read and handle events for the EtherCAT state, status, mailbox and eeprom.
|
||||||
*/
|
*/
|
||||||
void ecat_slv_poll(void)
|
void ecat_slv_poll (void)
|
||||||
{
|
{
|
||||||
/* Read local time from ESC*/
|
/* Read local time from ESC*/
|
||||||
ESC_read(ESCREG_LOCALTIME, (void *)&ESCvar.Time, sizeof(ESCvar.Time));
|
ESC_read (ESCREG_LOCALTIME, (void *) &ESCvar.Time, sizeof (ESCvar.Time));
|
||||||
ESCvar.Time = etohl(ESCvar.Time);
|
ESCvar.Time = etohl (ESCvar.Time);
|
||||||
|
|
||||||
/* Check the state machine */
|
/* Check the state machine */
|
||||||
ESC_state();
|
ESC_state();
|
||||||
@@ -337,50 +336,50 @@ void ecat_slv_poll(void)
|
|||||||
/*
|
/*
|
||||||
* Poll all events in a free-run application
|
* Poll all events in a free-run application
|
||||||
*/
|
*/
|
||||||
void ecat_slv(void)
|
void ecat_slv (void)
|
||||||
{
|
{
|
||||||
ecat_slv_poll();
|
ecat_slv_poll();
|
||||||
DIG_process(ESC_ALeventread(), DIG_PROCESS_WD_FLAG | DIG_PROCESS_OUTPUTS_FLAG |
|
DIG_process(DIG_PROCESS_WD_FLAG | DIG_PROCESS_OUTPUTS_FLAG |
|
||||||
DIG_PROCESS_APP_HOOK_FLAG | DIG_PROCESS_INPUTS_FLAG);
|
DIG_PROCESS_APP_HOOK_FLAG | DIG_PROCESS_INPUTS_FLAG);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initialize the slave stack.
|
* Initialize the slave stack.
|
||||||
*/
|
*/
|
||||||
void ecat_slv_init(esc_cfg_t *config)
|
void ecat_slv_init (esc_cfg_t * config)
|
||||||
{
|
{
|
||||||
/* Init watchdog */
|
/* Init watchdog */
|
||||||
watchdog = config->watchdog_cnt;
|
watchdog = config->watchdog_cnt;
|
||||||
|
|
||||||
/* Call stack configuration */
|
/* Call stack configuration */
|
||||||
ESC_config(config);
|
ESC_config (config);
|
||||||
/* Call HW init */
|
/* Call HW init */
|
||||||
ESC_init(config);
|
ESC_init (config);
|
||||||
|
|
||||||
/* wait until ESC is started up */
|
/* wait until ESC is started up */
|
||||||
while ((ESCvar.DLstatus & 0x0001) == 0)
|
while ((ESCvar.DLstatus & 0x0001) == 0)
|
||||||
{
|
{
|
||||||
ESC_read(ESCREG_DLSTATUS, (void *)&ESCvar.DLstatus,
|
ESC_read (ESCREG_DLSTATUS, (void *) &ESCvar.DLstatus,
|
||||||
sizeof(ESCvar.DLstatus));
|
sizeof (ESCvar.DLstatus));
|
||||||
ESCvar.DLstatus = etohs(ESCvar.DLstatus);
|
ESCvar.DLstatus = etohs (ESCvar.DLstatus);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if USE_FOE
|
#if USE_FOE
|
||||||
/* Init FoE */
|
/* Init FoE */
|
||||||
FOE_init();
|
FOE_init ();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if USE_EOE
|
#if USE_EOE
|
||||||
/* Init EoE */
|
/* Init EoE */
|
||||||
EOE_init();
|
EOE_init ();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* reset ESC to init state */
|
/* reset ESC to init state */
|
||||||
ESC_ALstatus(ESCinit);
|
ESC_ALstatus (ESCinit);
|
||||||
ESC_ALerror(ALERR_NONE);
|
ESC_ALerror (ALERR_NONE);
|
||||||
ESC_stopmbx();
|
ESC_stopmbx ();
|
||||||
ESC_stopinput();
|
ESC_stopinput ();
|
||||||
ESC_stopoutput();
|
ESC_stopoutput ();
|
||||||
/* Init Object Dictionary default values */
|
/* Init Object Dictionary default values */
|
||||||
COE_initDefaultValues();
|
COE_initDefaultValues ();
|
||||||
}
|
}
|
||||||
@@ -15,7 +15,7 @@
|
|||||||
void cb_get_inputs();
|
void cb_get_inputs();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* This function is called when to set outputs values
|
* This function is called when to set outputs values
|
||||||
*/
|
*/
|
||||||
void cb_set_outputs();
|
void cb_set_outputs();
|
||||||
|
|
||||||
@@ -23,12 +23,12 @@ void cb_set_outputs();
|
|||||||
*
|
*
|
||||||
* @param[in] watchdogcnt = new watchdog count value
|
* @param[in] watchdogcnt = new watchdog count value
|
||||||
*/
|
*/
|
||||||
void APP_setwatchdog(int watchdogcnt);
|
void APP_setwatchdog (int watchdogcnt);
|
||||||
|
|
||||||
#define DIG_PROCESS_INPUTS_FLAG 0x01
|
#define DIG_PROCESS_INPUTS_FLAG 0x01
|
||||||
#define DIG_PROCESS_OUTPUTS_FLAG 0x02
|
#define DIG_PROCESS_OUTPUTS_FLAG 0x02
|
||||||
#define DIG_PROCESS_WD_FLAG 0x04
|
#define DIG_PROCESS_WD_FLAG 0x04
|
||||||
#define DIG_PROCESS_APP_HOOK_FLAG 0x08
|
#define DIG_PROCESS_APP_HOOK_FLAG 0x08
|
||||||
/** Implements the watch-dog counter to count if we should make a state change
|
/** Implements the watch-dog counter to count if we should make a state change
|
||||||
* due to missing incoming SM2 events. Updates local I/O and run the application
|
* due to missing incoming SM2 events. Updates local I/O and run the application
|
||||||
* in the following order, call read EtherCAT outputs, execute user provided
|
* in the following order, call read EtherCAT outputs, execute user provided
|
||||||
@@ -36,7 +36,7 @@ void APP_setwatchdog(int watchdogcnt);
|
|||||||
*
|
*
|
||||||
* @param[in] flags = User input what to execute
|
* @param[in] flags = User input what to execute
|
||||||
*/
|
*/
|
||||||
void DIG_process(uint16_t ALEvent, uint8_t flags);
|
void DIG_process (uint8_t flags);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Handler for SM change, SM0/1, AL CONTROL and EEPROM events, the application
|
* Handler for SM change, SM0/1, AL CONTROL and EEPROM events, the application
|
||||||
@@ -46,24 +46,24 @@ void DIG_process(uint16_t ALEvent, uint8_t flags);
|
|||||||
* @param[in] event_mask = Event mask for interrupts to serve and re-activate
|
* @param[in] event_mask = Event mask for interrupts to serve and re-activate
|
||||||
* after served
|
* after served
|
||||||
*/
|
*/
|
||||||
void ecat_slv_worker(uint32_t event_mask);
|
void ecat_slv_worker (uint32_t event_mask);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Poll SM0/1, EEPROM and AL CONTROL events in a SM/DC synchronization
|
* Poll SM0/1, EEPROM and AL CONTROL events in a SM/DC synchronization
|
||||||
* application
|
* application
|
||||||
*/
|
*/
|
||||||
void ecat_slv_poll(void);
|
void ecat_slv_poll (void);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Poll all events in a free-run application
|
* Poll all events in a free-run application
|
||||||
*/
|
*/
|
||||||
void ecat_slv(void);
|
void ecat_slv (void);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Initialize the slave stack
|
* Initialize the slave stack
|
||||||
*
|
*
|
||||||
* @param[in] config = User input how to configure the stack
|
* @param[in] config = User input how to configure the stack
|
||||||
*/
|
*/
|
||||||
void ecat_slv_init(esc_cfg_t *config);
|
void ecat_slv_init (esc_cfg_t * config);
|
||||||
|
|
||||||
#endif /* __ECAT_SLV_H__ */
|
#endif /* __ECAT_SLV_H__ */
|
||||||
@@ -79,7 +79,7 @@
|
|||||||
"pdo_mappings": [
|
"pdo_mappings": [
|
||||||
"txpdo"
|
"txpdo"
|
||||||
],
|
],
|
||||||
"dtype": "UNSIGNED16",
|
"dtype": "UNSIGNED32",
|
||||||
"value": "0",
|
"value": "0",
|
||||||
"data": "&Obj.DiffT"
|
"data": "&Obj.DiffT"
|
||||||
},
|
},
|
||||||
@@ -104,76 +104,21 @@
|
|||||||
"dtype": "UNSIGNED32",
|
"dtype": "UNSIGNED32",
|
||||||
"value": "0",
|
"value": "0",
|
||||||
"data": "&Obj.IndexStatus"
|
"data": "&Obj.IndexStatus"
|
||||||
},
|
|
||||||
"6005": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "ActualPosition1",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"txpdo"
|
|
||||||
],
|
|
||||||
"dtype": "REAL32",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.ActualPosition1"
|
|
||||||
},
|
|
||||||
"6006": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "ActualPosition2",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"txpdo"
|
|
||||||
],
|
|
||||||
"dtype": "REAL32",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.ActualPosition2"
|
|
||||||
},
|
|
||||||
"6007": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "D1",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"txpdo"
|
|
||||||
],
|
|
||||||
"dtype": "INTEGER16",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.D1"
|
|
||||||
},
|
|
||||||
"6008": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "D2",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"txpdo"
|
|
||||||
],
|
|
||||||
"dtype": "INTEGER16",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.D2"
|
|
||||||
},
|
|
||||||
"6009": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "D3",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"txpdo"
|
|
||||||
],
|
|
||||||
"dtype": "INTEGER16",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.D3"
|
|
||||||
},
|
|
||||||
"600A": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "D4",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"txpdo"
|
|
||||||
],
|
|
||||||
"dtype": "INTEGER16",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.D4"
|
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
"rxpdo": {
|
"rxpdo": {
|
||||||
"7000": {
|
"7000": {
|
||||||
|
"otype": "VAR",
|
||||||
|
"name": "EncPosScale",
|
||||||
|
"access": "RO",
|
||||||
|
"pdo_mappings": [
|
||||||
|
"rxpdo"
|
||||||
|
],
|
||||||
|
"dtype": "INTEGER32",
|
||||||
|
"value": "0",
|
||||||
|
"data": "&Obj.EncPosScale"
|
||||||
|
},
|
||||||
|
"7001": {
|
||||||
"otype": "VAR",
|
"otype": "VAR",
|
||||||
"name": "IndexLatchEnable",
|
"name": "IndexLatchEnable",
|
||||||
"access": "RO",
|
"access": "RO",
|
||||||
@@ -184,50 +129,6 @@
|
|||||||
"value": "0",
|
"value": "0",
|
||||||
"data": "&Obj.IndexLatchEnable"
|
"data": "&Obj.IndexLatchEnable"
|
||||||
},
|
},
|
||||||
"7001": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "CommandedPosition1",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"rxpdo"
|
|
||||||
],
|
|
||||||
"dtype": "REAL32",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.CommandedPosition1"
|
|
||||||
},
|
|
||||||
"7002": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "CommandedPosition2",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"rxpdo"
|
|
||||||
],
|
|
||||||
"dtype": "REAL32",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.CommandedPosition2"
|
|
||||||
},
|
|
||||||
"7003": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "StepsPerMM1",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"rxpdo"
|
|
||||||
],
|
|
||||||
"dtype": "INTEGER16",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.StepsPerMM1"
|
|
||||||
},
|
|
||||||
"7004": {
|
|
||||||
"otype": "VAR",
|
|
||||||
"name": "StepsPerMM2",
|
|
||||||
"access": "RO",
|
|
||||||
"pdo_mappings": [
|
|
||||||
"rxpdo"
|
|
||||||
],
|
|
||||||
"dtype": "INTEGER16",
|
|
||||||
"value": "0",
|
|
||||||
"data": "&Obj.StepsPerMM2"
|
|
||||||
},
|
|
||||||
"60664": {
|
"60664": {
|
||||||
"otype": "VAR",
|
"otype": "VAR",
|
||||||
"name": "ActualPosition",
|
"name": "ActualPosition",
|
||||||
@@ -13,21 +13,12 @@ static const char acName1018_01[] = "Vendor ID";
|
|||||||
static const char acName1018_02[] = "Product Code";
|
static const char acName1018_02[] = "Product Code";
|
||||||
static const char acName1018_03[] = "Revision Number";
|
static const char acName1018_03[] = "Revision Number";
|
||||||
static const char acName1018_04[] = "Serial Number";
|
static const char acName1018_04[] = "Serial Number";
|
||||||
static const char acName1600[] = "IndexLatchEnable";
|
static const char acName1600[] = "EncPosScale";
|
||||||
static const char acName1600_00[] = "Max SubIndex";
|
static const char acName1600_00[] = "Max SubIndex";
|
||||||
static const char acName1600_01[] = "IndexLatchEnable";
|
static const char acName1600_01[] = "EncPosScale";
|
||||||
static const char acName1601[] = "CommandedPosition1";
|
static const char acName1601[] = "IndexLatchEnable";
|
||||||
static const char acName1601_00[] = "Max SubIndex";
|
static const char acName1601_00[] = "Max SubIndex";
|
||||||
static const char acName1601_01[] = "CommandedPosition1";
|
static const char acName1601_01[] = "IndexLatchEnable";
|
||||||
static const char acName1602[] = "CommandedPosition2";
|
|
||||||
static const char acName1602_00[] = "Max SubIndex";
|
|
||||||
static const char acName1602_01[] = "CommandedPosition2";
|
|
||||||
static const char acName1603[] = "StepsPerMM1";
|
|
||||||
static const char acName1603_00[] = "Max SubIndex";
|
|
||||||
static const char acName1603_01[] = "StepsPerMM1";
|
|
||||||
static const char acName1604[] = "StepsPerMM2";
|
|
||||||
static const char acName1604_00[] = "Max SubIndex";
|
|
||||||
static const char acName1604_01[] = "StepsPerMM2";
|
|
||||||
static const char acName1A00[] = "EncPos";
|
static const char acName1A00[] = "EncPos";
|
||||||
static const char acName1A00_00[] = "Max SubIndex";
|
static const char acName1A00_00[] = "Max SubIndex";
|
||||||
static const char acName1A00_01[] = "EncPos";
|
static const char acName1A00_01[] = "EncPos";
|
||||||
@@ -43,24 +34,6 @@ static const char acName1A03_01[] = "IndexByte";
|
|||||||
static const char acName1A04[] = "IndexStatus";
|
static const char acName1A04[] = "IndexStatus";
|
||||||
static const char acName1A04_00[] = "Max SubIndex";
|
static const char acName1A04_00[] = "Max SubIndex";
|
||||||
static const char acName1A04_01[] = "IndexStatus";
|
static const char acName1A04_01[] = "IndexStatus";
|
||||||
static const char acName1A05[] = "ActualPosition1";
|
|
||||||
static const char acName1A05_00[] = "Max SubIndex";
|
|
||||||
static const char acName1A05_01[] = "ActualPosition1";
|
|
||||||
static const char acName1A06[] = "ActualPosition2";
|
|
||||||
static const char acName1A06_00[] = "Max SubIndex";
|
|
||||||
static const char acName1A06_01[] = "ActualPosition2";
|
|
||||||
static const char acName1A07[] = "D1";
|
|
||||||
static const char acName1A07_00[] = "Max SubIndex";
|
|
||||||
static const char acName1A07_01[] = "D1";
|
|
||||||
static const char acName1A08[] = "D2";
|
|
||||||
static const char acName1A08_00[] = "Max SubIndex";
|
|
||||||
static const char acName1A08_01[] = "D2";
|
|
||||||
static const char acName1A09[] = "D3";
|
|
||||||
static const char acName1A09_00[] = "Max SubIndex";
|
|
||||||
static const char acName1A09_01[] = "D3";
|
|
||||||
static const char acName1A0A[] = "D4";
|
|
||||||
static const char acName1A0A_00[] = "Max SubIndex";
|
|
||||||
static const char acName1A0A_01[] = "D4";
|
|
||||||
static const char acName1C00[] = "Sync Manager Communication Type";
|
static const char acName1C00[] = "Sync Manager Communication Type";
|
||||||
static const char acName1C00_00[] = "Max SubIndex";
|
static const char acName1C00_00[] = "Max SubIndex";
|
||||||
static const char acName1C00_01[] = "Communications Type SM0";
|
static const char acName1C00_01[] = "Communications Type SM0";
|
||||||
@@ -71,9 +44,6 @@ static const char acName1C12[] = "Sync Manager 2 PDO Assignment";
|
|||||||
static const char acName1C12_00[] = "Max SubIndex";
|
static const char acName1C12_00[] = "Max SubIndex";
|
||||||
static const char acName1C12_01[] = "PDO Mapping";
|
static const char acName1C12_01[] = "PDO Mapping";
|
||||||
static const char acName1C12_02[] = "PDO Mapping";
|
static const char acName1C12_02[] = "PDO Mapping";
|
||||||
static const char acName1C12_03[] = "PDO Mapping";
|
|
||||||
static const char acName1C12_04[] = "PDO Mapping";
|
|
||||||
static const char acName1C12_05[] = "PDO Mapping";
|
|
||||||
static const char acName1C13[] = "Sync Manager 3 PDO Assignment";
|
static const char acName1C13[] = "Sync Manager 3 PDO Assignment";
|
||||||
static const char acName1C13_00[] = "Max SubIndex";
|
static const char acName1C13_00[] = "Max SubIndex";
|
||||||
static const char acName1C13_01[] = "PDO Mapping";
|
static const char acName1C13_01[] = "PDO Mapping";
|
||||||
@@ -81,28 +51,13 @@ static const char acName1C13_02[] = "PDO Mapping";
|
|||||||
static const char acName1C13_03[] = "PDO Mapping";
|
static const char acName1C13_03[] = "PDO Mapping";
|
||||||
static const char acName1C13_04[] = "PDO Mapping";
|
static const char acName1C13_04[] = "PDO Mapping";
|
||||||
static const char acName1C13_05[] = "PDO Mapping";
|
static const char acName1C13_05[] = "PDO Mapping";
|
||||||
static const char acName1C13_06[] = "PDO Mapping";
|
|
||||||
static const char acName1C13_07[] = "PDO Mapping";
|
|
||||||
static const char acName1C13_08[] = "PDO Mapping";
|
|
||||||
static const char acName1C13_09[] = "PDO Mapping";
|
|
||||||
static const char acName1C13_10[] = "PDO Mapping";
|
|
||||||
static const char acName1C13_11[] = "PDO Mapping";
|
|
||||||
static const char acName6000[] = "EncPos";
|
static const char acName6000[] = "EncPos";
|
||||||
static const char acName6001[] = "EncFrequency";
|
static const char acName6001[] = "EncFrequency";
|
||||||
static const char acName6002[] = "DiffT";
|
static const char acName6002[] = "DiffT";
|
||||||
static const char acName6003[] = "IndexByte";
|
static const char acName6003[] = "IndexByte";
|
||||||
static const char acName6004[] = "IndexStatus";
|
static const char acName6004[] = "IndexStatus";
|
||||||
static const char acName6005[] = "ActualPosition1";
|
static const char acName7000[] = "EncPosScale";
|
||||||
static const char acName6006[] = "ActualPosition2";
|
static const char acName7001[] = "IndexLatchEnable";
|
||||||
static const char acName6007[] = "D1";
|
|
||||||
static const char acName6008[] = "D2";
|
|
||||||
static const char acName6009[] = "D3";
|
|
||||||
static const char acName600A[] = "D4";
|
|
||||||
static const char acName7000[] = "IndexLatchEnable";
|
|
||||||
static const char acName7001[] = "CommandedPosition1";
|
|
||||||
static const char acName7002[] = "CommandedPosition2";
|
|
||||||
static const char acName7003[] = "StepsPerMM1";
|
|
||||||
static const char acName7004[] = "StepsPerMM2";
|
|
||||||
|
|
||||||
const _objd SDO1000[] =
|
const _objd SDO1000[] =
|
||||||
{
|
{
|
||||||
@@ -138,21 +93,6 @@ const _objd SDO1601[] =
|
|||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1601_00, 1, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1601_00, 1, NULL},
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1601_01, 0x70010020, NULL},
|
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1601_01, 0x70010020, NULL},
|
||||||
};
|
};
|
||||||
const _objd SDO1602[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1602_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1602_01, 0x70020020, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1603[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1603_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1603_01, 0x70030010, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1604[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1604_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1604_01, 0x70040010, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1A00[] =
|
const _objd SDO1A00[] =
|
||||||
{
|
{
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A00_00, 1, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A00_00, 1, NULL},
|
||||||
@@ -166,7 +106,7 @@ const _objd SDO1A01[] =
|
|||||||
const _objd SDO1A02[] =
|
const _objd SDO1A02[] =
|
||||||
{
|
{
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A02_00, 1, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A02_00, 1, NULL},
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A02_01, 0x60020010, NULL},
|
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A02_01, 0x60020020, NULL},
|
||||||
};
|
};
|
||||||
const _objd SDO1A03[] =
|
const _objd SDO1A03[] =
|
||||||
{
|
{
|
||||||
@@ -178,36 +118,6 @@ const _objd SDO1A04[] =
|
|||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A04_00, 1, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A04_00, 1, NULL},
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A04_01, 0x60040020, NULL},
|
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A04_01, 0x60040020, NULL},
|
||||||
};
|
};
|
||||||
const _objd SDO1A05[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A05_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A05_01, 0x60050020, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1A06[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A06_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A06_01, 0x60060020, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1A07[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A07_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A07_01, 0x60070010, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1A08[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A08_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A08_01, 0x60080010, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1A09[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A09_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A09_01, 0x60090010, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1A0A[] =
|
|
||||||
{
|
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A0A_00, 1, NULL},
|
|
||||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A0A_01, 0x600A0010, NULL},
|
|
||||||
};
|
|
||||||
const _objd SDO1C00[] =
|
const _objd SDO1C00[] =
|
||||||
{
|
{
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C00_00, 4, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C00_00, 4, NULL},
|
||||||
@@ -218,27 +128,18 @@ const _objd SDO1C00[] =
|
|||||||
};
|
};
|
||||||
const _objd SDO1C12[] =
|
const _objd SDO1C12[] =
|
||||||
{
|
{
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C12_00, 5, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C12_00, 2, NULL},
|
||||||
{0x01, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_01, 0x1600, NULL},
|
{0x01, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_01, 0x1600, NULL},
|
||||||
{0x02, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_02, 0x1601, NULL},
|
{0x02, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_02, 0x1601, NULL},
|
||||||
{0x03, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_03, 0x1602, NULL},
|
|
||||||
{0x04, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_04, 0x1603, NULL},
|
|
||||||
{0x05, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_05, 0x1604, NULL},
|
|
||||||
};
|
};
|
||||||
const _objd SDO1C13[] =
|
const _objd SDO1C13[] =
|
||||||
{
|
{
|
||||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C13_00, 11, NULL},
|
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C13_00, 5, NULL},
|
||||||
{0x01, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_01, 0x1A00, NULL},
|
{0x01, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_01, 0x1A00, NULL},
|
||||||
{0x02, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_02, 0x1A01, NULL},
|
{0x02, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_02, 0x1A01, NULL},
|
||||||
{0x03, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_03, 0x1A02, NULL},
|
{0x03, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_03, 0x1A02, NULL},
|
||||||
{0x04, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_04, 0x1A03, NULL},
|
{0x04, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_04, 0x1A03, NULL},
|
||||||
{0x05, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_05, 0x1A04, NULL},
|
{0x05, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_05, 0x1A04, NULL},
|
||||||
{0x06, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_06, 0x1A05, NULL},
|
|
||||||
{0x07, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_07, 0x1A06, NULL},
|
|
||||||
{0x08, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_08, 0x1A07, NULL},
|
|
||||||
{0x09, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_09, 0x1A08, NULL},
|
|
||||||
{0x0a, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_10, 0x1A09, NULL},
|
|
||||||
{0x0b, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_11, 0x1A0A, NULL},
|
|
||||||
};
|
};
|
||||||
const _objd SDO6000[] =
|
const _objd SDO6000[] =
|
||||||
{
|
{
|
||||||
@@ -250,7 +151,7 @@ const _objd SDO6001[] =
|
|||||||
};
|
};
|
||||||
const _objd SDO6002[] =
|
const _objd SDO6002[] =
|
||||||
{
|
{
|
||||||
{0x0, DTYPE_UNSIGNED16, 16, ATYPE_RO | ATYPE_TXPDO, acName6002, 0, &Obj.DiffT},
|
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_TXPDO, acName6002, 0, &Obj.DiffT},
|
||||||
};
|
};
|
||||||
const _objd SDO6003[] =
|
const _objd SDO6003[] =
|
||||||
{
|
{
|
||||||
@@ -260,49 +161,13 @@ const _objd SDO6004[] =
|
|||||||
{
|
{
|
||||||
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_TXPDO, acName6004, 0, &Obj.IndexStatus},
|
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_TXPDO, acName6004, 0, &Obj.IndexStatus},
|
||||||
};
|
};
|
||||||
const _objd SDO6005[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_REAL32, 32, ATYPE_RO | ATYPE_TXPDO, acName6005, 0x00000000, &Obj.ActualPosition1},
|
|
||||||
};
|
|
||||||
const _objd SDO6006[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_REAL32, 32, ATYPE_RO | ATYPE_TXPDO, acName6006, 0x00000000, &Obj.ActualPosition2},
|
|
||||||
};
|
|
||||||
const _objd SDO6007[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_INTEGER16, 16, ATYPE_RO | ATYPE_TXPDO, acName6007, 0, &Obj.D1},
|
|
||||||
};
|
|
||||||
const _objd SDO6008[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_INTEGER16, 16, ATYPE_RO | ATYPE_TXPDO, acName6008, 0, &Obj.D2},
|
|
||||||
};
|
|
||||||
const _objd SDO6009[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_INTEGER16, 16, ATYPE_RO | ATYPE_TXPDO, acName6009, 0, &Obj.D3},
|
|
||||||
};
|
|
||||||
const _objd SDO600A[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_INTEGER16, 16, ATYPE_RO | ATYPE_TXPDO, acName600A, 0, &Obj.D4},
|
|
||||||
};
|
|
||||||
const _objd SDO7000[] =
|
const _objd SDO7000[] =
|
||||||
{
|
{
|
||||||
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_RXPDO, acName7000, 0, &Obj.IndexLatchEnable},
|
{0x0, DTYPE_INTEGER32, 32, ATYPE_RO | ATYPE_RXPDO, acName7000, 0, &Obj.EncPosScale},
|
||||||
};
|
};
|
||||||
const _objd SDO7001[] =
|
const _objd SDO7001[] =
|
||||||
{
|
{
|
||||||
{0x0, DTYPE_REAL32, 32, ATYPE_RO | ATYPE_RXPDO, acName7001, 0x00000000, &Obj.CommandedPosition1},
|
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_RXPDO, acName7001, 0, &Obj.IndexLatchEnable},
|
||||||
};
|
|
||||||
const _objd SDO7002[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_REAL32, 32, ATYPE_RO | ATYPE_RXPDO, acName7002, 0x00000000, &Obj.CommandedPosition2},
|
|
||||||
};
|
|
||||||
const _objd SDO7003[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_INTEGER16, 16, ATYPE_RO | ATYPE_RXPDO, acName7003, 0, &Obj.StepsPerMM1},
|
|
||||||
};
|
|
||||||
const _objd SDO7004[] =
|
|
||||||
{
|
|
||||||
{0x0, DTYPE_INTEGER16, 16, ATYPE_RO | ATYPE_RXPDO, acName7004, 0, &Obj.StepsPerMM2},
|
|
||||||
};
|
};
|
||||||
|
|
||||||
const _objectlist SDOobjects[] =
|
const _objectlist SDOobjects[] =
|
||||||
@@ -314,38 +179,20 @@ const _objectlist SDOobjects[] =
|
|||||||
{0x1018, OTYPE_RECORD, 4, 0, acName1018, SDO1018},
|
{0x1018, OTYPE_RECORD, 4, 0, acName1018, SDO1018},
|
||||||
{0x1600, OTYPE_RECORD, 1, 0, acName1600, SDO1600},
|
{0x1600, OTYPE_RECORD, 1, 0, acName1600, SDO1600},
|
||||||
{0x1601, OTYPE_RECORD, 1, 0, acName1601, SDO1601},
|
{0x1601, OTYPE_RECORD, 1, 0, acName1601, SDO1601},
|
||||||
{0x1602, OTYPE_RECORD, 1, 0, acName1602, SDO1602},
|
|
||||||
{0x1603, OTYPE_RECORD, 1, 0, acName1603, SDO1603},
|
|
||||||
{0x1604, OTYPE_RECORD, 1, 0, acName1604, SDO1604},
|
|
||||||
{0x1A00, OTYPE_RECORD, 1, 0, acName1A00, SDO1A00},
|
{0x1A00, OTYPE_RECORD, 1, 0, acName1A00, SDO1A00},
|
||||||
{0x1A01, OTYPE_RECORD, 1, 0, acName1A01, SDO1A01},
|
{0x1A01, OTYPE_RECORD, 1, 0, acName1A01, SDO1A01},
|
||||||
{0x1A02, OTYPE_RECORD, 1, 0, acName1A02, SDO1A02},
|
{0x1A02, OTYPE_RECORD, 1, 0, acName1A02, SDO1A02},
|
||||||
{0x1A03, OTYPE_RECORD, 1, 0, acName1A03, SDO1A03},
|
{0x1A03, OTYPE_RECORD, 1, 0, acName1A03, SDO1A03},
|
||||||
{0x1A04, OTYPE_RECORD, 1, 0, acName1A04, SDO1A04},
|
{0x1A04, OTYPE_RECORD, 1, 0, acName1A04, SDO1A04},
|
||||||
{0x1A05, OTYPE_RECORD, 1, 0, acName1A05, SDO1A05},
|
|
||||||
{0x1A06, OTYPE_RECORD, 1, 0, acName1A06, SDO1A06},
|
|
||||||
{0x1A07, OTYPE_RECORD, 1, 0, acName1A07, SDO1A07},
|
|
||||||
{0x1A08, OTYPE_RECORD, 1, 0, acName1A08, SDO1A08},
|
|
||||||
{0x1A09, OTYPE_RECORD, 1, 0, acName1A09, SDO1A09},
|
|
||||||
{0x1A0A, OTYPE_RECORD, 1, 0, acName1A0A, SDO1A0A},
|
|
||||||
{0x1C00, OTYPE_ARRAY, 4, 0, acName1C00, SDO1C00},
|
{0x1C00, OTYPE_ARRAY, 4, 0, acName1C00, SDO1C00},
|
||||||
{0x1C12, OTYPE_ARRAY, 5, 0, acName1C12, SDO1C12},
|
{0x1C12, OTYPE_ARRAY, 2, 0, acName1C12, SDO1C12},
|
||||||
{0x1C13, OTYPE_ARRAY, 11, 0, acName1C13, SDO1C13},
|
{0x1C13, OTYPE_ARRAY, 5, 0, acName1C13, SDO1C13},
|
||||||
{0x6000, OTYPE_VAR, 0, 0, acName6000, SDO6000},
|
{0x6000, OTYPE_VAR, 0, 0, acName6000, SDO6000},
|
||||||
{0x6001, OTYPE_VAR, 0, 0, acName6001, SDO6001},
|
{0x6001, OTYPE_VAR, 0, 0, acName6001, SDO6001},
|
||||||
{0x6002, OTYPE_VAR, 0, 0, acName6002, SDO6002},
|
{0x6002, OTYPE_VAR, 0, 0, acName6002, SDO6002},
|
||||||
{0x6003, OTYPE_VAR, 0, 0, acName6003, SDO6003},
|
{0x6003, OTYPE_VAR, 0, 0, acName6003, SDO6003},
|
||||||
{0x6004, OTYPE_VAR, 0, 0, acName6004, SDO6004},
|
{0x6004, OTYPE_VAR, 0, 0, acName6004, SDO6004},
|
||||||
{0x6005, OTYPE_VAR, 0, 0, acName6005, SDO6005},
|
|
||||||
{0x6006, OTYPE_VAR, 0, 0, acName6006, SDO6006},
|
|
||||||
{0x6007, OTYPE_VAR, 0, 0, acName6007, SDO6007},
|
|
||||||
{0x6008, OTYPE_VAR, 0, 0, acName6008, SDO6008},
|
|
||||||
{0x6009, OTYPE_VAR, 0, 0, acName6009, SDO6009},
|
|
||||||
{0x600A, OTYPE_VAR, 0, 0, acName600A, SDO600A},
|
|
||||||
{0x7000, OTYPE_VAR, 0, 0, acName7000, SDO7000},
|
{0x7000, OTYPE_VAR, 0, 0, acName7000, SDO7000},
|
||||||
{0x7001, OTYPE_VAR, 0, 0, acName7001, SDO7001},
|
{0x7001, OTYPE_VAR, 0, 0, acName7001, SDO7001},
|
||||||
{0x7002, OTYPE_VAR, 0, 0, acName7002, SDO7002},
|
|
||||||
{0x7003, OTYPE_VAR, 0, 0, acName7003, SDO7003},
|
|
||||||
{0x7004, OTYPE_VAR, 0, 0, acName7004, SDO7004},
|
|
||||||
{0xffff, 0xff, 0xff, 0xff, NULL, NULL}
|
{0xffff, 0xff, 0xff, 0xff, NULL, NULL}
|
||||||
};
|
};
|
||||||
@@ -15,23 +15,14 @@ typedef struct
|
|||||||
|
|
||||||
float EncPos;
|
float EncPos;
|
||||||
float EncFrequency;
|
float EncFrequency;
|
||||||
uint16_t DiffT;
|
uint32_t DiffT;
|
||||||
uint32_t IndexByte;
|
uint32_t IndexByte;
|
||||||
uint32_t IndexStatus;
|
uint32_t IndexStatus;
|
||||||
float ActualPosition1;
|
|
||||||
float ActualPosition2;
|
|
||||||
int16_t D1;
|
|
||||||
int16_t D2;
|
|
||||||
int16_t D3;
|
|
||||||
int16_t D4;
|
|
||||||
|
|
||||||
/* Outputs */
|
/* Outputs */
|
||||||
|
|
||||||
|
int32_t EncPosScale;
|
||||||
uint32_t IndexLatchEnable;
|
uint32_t IndexLatchEnable;
|
||||||
float CommandedPosition1;
|
|
||||||
float CommandedPosition2;
|
|
||||||
int16_t StepsPerMM1;
|
|
||||||
int16_t StepsPerMM2;
|
|
||||||
|
|
||||||
} _Objects;
|
} _Objects;
|
||||||
|
|
||||||
@@ -16,9 +16,8 @@ upload_protocol = stlink
|
|||||||
debug_tool = stlink
|
debug_tool = stlink
|
||||||
debug_build_flags = -O0 -g -ggdb
|
debug_build_flags = -O0 -g -ggdb
|
||||||
monitor_port = COM7
|
monitor_port = COM7
|
||||||
monitor_filters = send_on_enter, time, colorize, log2file
|
|
||||||
monitor_speed = 115200
|
monitor_speed = 115200
|
||||||
build_flags = -Wl,--no-warn-rwx-segment
|
build_flags = -Wl,--no-warn-rwx-segment
|
||||||
lib_deps =
|
lib_deps =
|
||||||
SPI
|
SPI
|
||||||
rlogiacco/CircularBuffer
|
rlogiacco/CircularBuffer@^1.3.3
|
||||||
270
Pcb-1-lan9252/Firmware/src/Stepper.cpp
Executable file
270
Pcb-1-lan9252/Firmware/src/Stepper.cpp
Executable file
@@ -0,0 +1,270 @@
|
|||||||
|
#include <Arduino.h>
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file : main.c
|
||||||
|
* @brief : Main program body
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2023 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "Stepper.h"
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PTD */
|
||||||
|
|
||||||
|
/* USER CODE END PTD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
TIM_HandleTypeDef htim1;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
void SystemClock_Config(void);
|
||||||
|
static void MX_GPIO_Init(void);
|
||||||
|
static void MX_TIM1_Init(void);
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* Private user code ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if (htim->Instance == TIM1)
|
||||||
|
{
|
||||||
|
//__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
/**TIM1 GPIO Configuration
|
||||||
|
PE9 ------> TIM1_CH1
|
||||||
|
PA8 ------< TIM1_CH1
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_8; // 9;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||||
|
// HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||||
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief The application entry point.
|
||||||
|
* @retval int
|
||||||
|
*/
|
||||||
|
void StepperSetup(void)
|
||||||
|
{
|
||||||
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||||
|
// HAL_Init();
|
||||||
|
// SystemClock_Config();
|
||||||
|
|
||||||
|
/* Initialize all configured peripherals */
|
||||||
|
// MX_GPIO_Init();
|
||||||
|
MX_TIM1_Init();
|
||||||
|
|
||||||
|
// htim1.Instance->ARR = 1;
|
||||||
|
// htim1.Instance->CCR1 = 1;
|
||||||
|
HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
|
||||||
|
TIM_TypeDef *TIMM = TIM1;
|
||||||
|
|
||||||
|
#define CLOCK_FREQ (168000000-2000000)
|
||||||
|
// Best range on timer clock frequency/pulse length/65355 +1 => best resolution in the pulse range
|
||||||
|
TIM1->PSC = CLOCK_FREQ / 1000 / (1 << 16);
|
||||||
|
|
||||||
|
/* Infinite loop */
|
||||||
|
#if 0
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
makePulses(1200, 15);
|
||||||
|
HAL_Delay(1000);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void makePulses(uint32_t totalLength /* µsec */, uint32_t nPulses)
|
||||||
|
{
|
||||||
|
uint64_t TickFreq = CLOCK_FREQ / (TIM1->PSC+1); // 56 MHz at PSC=2
|
||||||
|
uint64_t TicksTotal = TickFreq * totalLength / 1000000; // Total number of ticks during this time, ca 56000
|
||||||
|
uint32_t TicksPerPulse = TicksTotal / nPulses;
|
||||||
|
|
||||||
|
TIM1->ARR = TicksPerPulse - 1;
|
||||||
|
TIM1->CCR1 = TicksPerPulse / 2;
|
||||||
|
TIM1->RCR = nPulses - 1;
|
||||||
|
TIM1->EGR = TIM_EGR_UG;
|
||||||
|
TIM1->CR1 |= TIM_CR1_OPM;
|
||||||
|
TIM1->CR1 |= TIM_CR1_CEN;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System Clock Configuration
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemClock_Config(void)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
|
||||||
|
/** Configure the main internal regulator output voltage
|
||||||
|
*/
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/** Initializes the RCC Oscillators according to the specified parameters
|
||||||
|
* in the RCC_OscInitTypeDef structure.
|
||||||
|
*/
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 168;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/** Initializes the CPU, AHB and APB buses clocks
|
||||||
|
*/
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIM1 Initialization Function
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
static void MX_TIM1_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM1_Init 0 */
|
||||||
|
|
||||||
|
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||||
|
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||||
|
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||||
|
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||||
|
|
||||||
|
/* USER CODE BEGIN TIM1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM1_Init 1 */
|
||||||
|
htim1.Instance = TIM1;
|
||||||
|
htim1.Init.Prescaler = 70;
|
||||||
|
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
htim1.Init.Period = 65535;
|
||||||
|
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
|
htim1.Init.RepetitionCounter = 10;
|
||||||
|
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
|
||||||
|
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||||
|
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||||
|
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||||
|
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sConfigOC.OCMode = TIM_OCMODE_PWM2;
|
||||||
|
sConfigOC.Pulse = 0;
|
||||||
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
|
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||||
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
|
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||||
|
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||||
|
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||||
|
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||||
|
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||||
|
sBreakDeadTimeConfig.DeadTime = 0;
|
||||||
|
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||||
|
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||||
|
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||||
|
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN TIM1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END TIM1_Init 2 */
|
||||||
|
HAL_TIM_MspPostInit(&htim1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief GPIO Initialization Function
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
static void MX_GPIO_Init(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN MX_GPIO_Init_1 */
|
||||||
|
/* USER CODE END MX_GPIO_Init_1 */
|
||||||
|
|
||||||
|
/* GPIO Ports Clock Enable */
|
||||||
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
||||||
|
/* USER CODE END MX_GPIO_Init_2 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 4 */
|
||||||
|
|
||||||
|
/* USER CODE END 4 */
|
||||||
@@ -5,21 +5,45 @@
|
|||||||
Created on: Nov 20, 2020
|
Created on: Nov 20, 2020
|
||||||
Author: GoktugH.
|
Author: GoktugH.
|
||||||
*/
|
*/
|
||||||
// TIM2, TIM3, TIM4, TIM8
|
|
||||||
Encoder::Encoder()
|
Encoder::Encoder()
|
||||||
{
|
{
|
||||||
int unit;
|
int unit;
|
||||||
}
|
}
|
||||||
|
|
||||||
// void Encoder::SetCount(enum EncTimer enc, int64_t Counter)
|
void Encoder::eattach(int enco)
|
||||||
void Encoder::SetCount(int64_t Counter)
|
|
||||||
{
|
{
|
||||||
tim_base->CNT = Counter;
|
|
||||||
}
|
}
|
||||||
// uint16_t Encoder::GetCount(enum EncTimer enc)
|
|
||||||
uint16_t Encoder::GetCount()
|
void Encoder::attachh(int encoNumber)
|
||||||
{
|
{
|
||||||
return tim_base->CNT;
|
eattach(encoNumber);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Encoder::SetCount(enum EncTimer enc, int64_t Counter)
|
||||||
|
{
|
||||||
|
|
||||||
|
if (enc == Tim2)
|
||||||
|
TIM2->CNT = Counter;
|
||||||
|
else if (enc == Tim3)
|
||||||
|
TIM3->CNT = Counter;
|
||||||
|
else if (enc == Tim4)
|
||||||
|
TIM4->CNT = Counter;
|
||||||
|
else if (enc == Tim8)
|
||||||
|
TIM8->CNT = Counter;
|
||||||
|
}
|
||||||
|
uint16_t Encoder::GetCount(enum EncTimer enc)
|
||||||
|
{
|
||||||
|
|
||||||
|
if (enc == Tim2)
|
||||||
|
c = (TIM2->CNT);
|
||||||
|
else if (enc == Tim3)
|
||||||
|
c = (TIM3->CNT);
|
||||||
|
else if (enc == Tim4)
|
||||||
|
c = (TIM4->CNT);
|
||||||
|
else if (enc == Tim8)
|
||||||
|
c = (TIM8->CNT);
|
||||||
|
return c;
|
||||||
}
|
}
|
||||||
|
|
||||||
void GpioConfigPortA(GPIO_TypeDef *GPIOx)
|
void GpioConfigPortA(GPIO_TypeDef *GPIOx)
|
||||||
@@ -263,7 +287,7 @@ void GPIO_PinAF(GPIO_TypeDef *GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
|
|||||||
GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
|
GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
|
||||||
}
|
}
|
||||||
|
|
||||||
void encoder_config()
|
void rcc_config()
|
||||||
{
|
{
|
||||||
RCC->AHB1ENR |= 0x1; // GPIOA
|
RCC->AHB1ENR |= 0x1; // GPIOA
|
||||||
RCC->AHB1ENR |= 0x4; // GPIOC
|
RCC->AHB1ENR |= 0x4; // GPIOC
|
||||||
@@ -271,27 +295,27 @@ void encoder_config()
|
|||||||
RCC->AHB1ENR |= 0x10; // GPIOE
|
RCC->AHB1ENR |= 0x10; // GPIOE
|
||||||
|
|
||||||
RCC->APB1ENR |= 0x20000000; // ENABLE DAC
|
RCC->APB1ENR |= 0x20000000; // ENABLE DAC
|
||||||
// RCC->APB2ENR |= 0x00000002; // APB2 TIM8
|
RCC->APB2ENR |= 0x00000002; // APB2 TIM8
|
||||||
RCC->APB1ENR |= 0x00000004; // APB1 TIM4
|
RCC->APB1ENR |= 0x00000004; // APB1 TIM4
|
||||||
RCC->APB1ENR |= 0x00000001; // APB1 TIM2
|
RCC->APB1ENR |= 0x00000001; // APB1 TIM2
|
||||||
// RCC->APB1ENR |= 0x00000002; // APB1 TIM3
|
RCC->APB1ENR |= 0x00000002; // APB1 TIM3
|
||||||
|
|
||||||
GpioConfigPortA(GPIOA);
|
GpioConfigPortA(GPIOA);
|
||||||
// GpioConfigPortC(GPIOC);
|
GpioConfigPortC(GPIOC);
|
||||||
GpioConfigPortD(GPIOD);
|
GpioConfigPortD(GPIOD);
|
||||||
#if 0 // Skipping since TIM8 is step generator and TIM3, chan4 is smae as TIM8, chan4
|
|
||||||
GPIO_PinAF(GPIOA, GPIO_PinSource6, GPIO_AF_TIM3);
|
GPIO_PinAF(GPIOA, GPIO_PinSource6, GPIO_AF_TIM3);
|
||||||
GPIO_PinAF(GPIOA, GPIO_PinSource7, GPIO_AF_TIM3);
|
GPIO_PinAF(GPIOA, GPIO_PinSource7, GPIO_AF_TIM3);
|
||||||
|
|
||||||
GPIO_PinAF(GPIOC, GPIO_PinSource6, GPIO_AF_TIM8);
|
GPIO_PinAF(GPIOC, GPIO_PinSource6, GPIO_AF_TIM8);
|
||||||
GPIO_PinAF(GPIOC, GPIO_PinSource7, GPIO_AF_TIM8);
|
GPIO_PinAF(GPIOC, GPIO_PinSource7, GPIO_AF_TIM8);
|
||||||
#endif
|
|
||||||
GPIO_PinAF(GPIOD, GPIO_PinSource12, GPIO_AF_TIM4);
|
GPIO_PinAF(GPIOD, GPIO_PinSource12, GPIO_AF_TIM4);
|
||||||
GPIO_PinAF(GPIOD, GPIO_PinSource13, GPIO_AF_TIM4);
|
GPIO_PinAF(GPIOD, GPIO_PinSource13, GPIO_AF_TIM4);
|
||||||
|
|
||||||
GPIO_PinAF(GPIOA, GPIO_PinSource0, GPIO_AF_TIM2);
|
GPIO_PinAF(GPIOA, GPIO_PinSource0, GPIO_AF_TIM2);
|
||||||
GPIO_PinAF(GPIOA, GPIO_PinSource1, GPIO_AF_TIM2);
|
GPIO_PinAF(GPIOA, GPIO_PinSource1, GPIO_AF_TIM2);
|
||||||
#if 0 // Skipping since I use TIM8 as stepper generator
|
|
||||||
TIM_EncoderInterConfig(TIM8, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
TIM_EncoderInterConfig(TIM8, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
||||||
TIMER_InitStructure.TIM_Period = 65535;
|
TIMER_InitStructure.TIM_Period = 65535;
|
||||||
TIMER_InitStructure.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
TIMER_InitStructure.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
||||||
@@ -299,7 +323,7 @@ void encoder_config()
|
|||||||
TIM_TimeBaseStructInit(&TIMER_InitStructure);
|
TIM_TimeBaseStructInit(&TIMER_InitStructure);
|
||||||
TIM_Cmd(TIM8, ENABLE);
|
TIM_Cmd(TIM8, ENABLE);
|
||||||
TIM8->CNT = 0;
|
TIM8->CNT = 0;
|
||||||
#endif
|
|
||||||
TIM_EncoderInterConfig(TIM4, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
TIM_EncoderInterConfig(TIM4, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
||||||
TIMER_InitStructureE.TIM_Period = 65535;
|
TIMER_InitStructureE.TIM_Period = 65535;
|
||||||
TIMER_InitStructureE.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
TIMER_InitStructureE.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
||||||
@@ -316,7 +340,7 @@ void encoder_config()
|
|||||||
TIM_Cmd(TIM2, ENABLE);
|
TIM_Cmd(TIM2, ENABLE);
|
||||||
|
|
||||||
TIM2->CNT = 0;
|
TIM2->CNT = 0;
|
||||||
#if 0
|
|
||||||
TIM_EncoderInterConfig(TIM3, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
TIM_EncoderInterConfig(TIM3, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
||||||
TIMER_InitStructureEEG.TIM_Period = 65535;
|
TIMER_InitStructureEEG.TIM_Period = 65535;
|
||||||
TIMER_InitStructureEEG.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
TIMER_InitStructureEEG.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
||||||
@@ -325,67 +349,4 @@ void encoder_config()
|
|||||||
TIM_Cmd(TIM3, ENABLE);
|
TIM_Cmd(TIM3, ENABLE);
|
||||||
|
|
||||||
TIM3->CNT = 0;
|
TIM3->CNT = 0;
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void encoder2_config()
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
#include "mbed.h"
|
|
||||||
#include "stm32f4xx.h"
|
|
||||||
#include "stm32f4xx_hal_tim_ex.h"
|
|
||||||
|
|
||||||
TIM_HandleTypeDef timer;
|
|
||||||
TIM_Encoder_InitTypeDef encoder;
|
|
||||||
|
|
||||||
// direction to PA_9 -- step pulse to PA_8
|
|
||||||
|
|
||||||
int main()
|
|
||||||
{
|
|
||||||
|
|
||||||
GPIO_InitTypeDef GPIO_InitStruct;
|
|
||||||
__TIM1_CLK_ENABLE();
|
|
||||||
__GPIOA_CLK_ENABLE();
|
|
||||||
GPIO_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9;
|
|
||||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
||||||
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
|
|
||||||
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
|
|
||||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
|
||||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
||||||
|
|
||||||
timer.Instance = TIM1;
|
|
||||||
timer.Init.Period = 0xffff;
|
|
||||||
timer.Init.Prescaler = 0;
|
|
||||||
timer.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
|
||||||
timer.Init.CounterMode = TIM_COUNTERMODE_UP;
|
|
||||||
|
|
||||||
encoder.EncoderMode = TIM_ENCODERMODE_TI12;
|
|
||||||
encoder.IC1Filter = 0x0f;
|
|
||||||
encoder.IC1Polarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
|
||||||
encoder.IC1Prescaler = TIM_ICPSC_DIV4;
|
|
||||||
encoder.IC1Selection = TIM_ICSELECTION_DIRECTTI;
|
|
||||||
|
|
||||||
encoder.IC2Filter = 0x0f;
|
|
||||||
encoder.IC2Polarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
|
||||||
encoder.IC2Prescaler = TIM_ICPSC_DIV4;
|
|
||||||
encoder.IC2Selection = TIM_ICSELECTION_DIRECTTI;
|
|
||||||
|
|
||||||
HAL_TIM_Encoder_Init(&timer, &encoder);
|
|
||||||
HAL_TIM_Encoder_Start(&timer,TIM_CHANNEL_1);
|
|
||||||
|
|
||||||
|
|
||||||
TIM1->EGR = 1; // Generate an update event
|
|
||||||
TIM1->CR1 = 1; // Enable the counter
|
|
||||||
|
|
||||||
|
|
||||||
while (1) {
|
|
||||||
int16_t count1;
|
|
||||||
count1=TIM1->CNT;
|
|
||||||
|
|
||||||
printf("%d\r\n", count1);
|
|
||||||
wait(1.0);
|
|
||||||
|
|
||||||
};
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
154
Pcb-1-lan9252/Firmware/src/main.cpp
Executable file
154
Pcb-1-lan9252/Firmware/src/main.cpp
Executable file
@@ -0,0 +1,154 @@
|
|||||||
|
#include <Arduino.h>
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#include "ecat_slv.h"
|
||||||
|
#include "utypes.h"
|
||||||
|
};
|
||||||
|
#include <CircularBuffer.h>
|
||||||
|
#define RINGBUFFERLEN 101
|
||||||
|
CircularBuffer<double_t, RINGBUFFERLEN> Pos;
|
||||||
|
CircularBuffer<uint32_t, RINGBUFFERLEN> TDelta;
|
||||||
|
|
||||||
|
int64_t PreviousEncoderCounterValue = 0;
|
||||||
|
int64_t unwrap_encoder(uint16_t in, int64_t *prev);
|
||||||
|
#include <Stm32F4_Encoder.h>
|
||||||
|
Encoder EncoderInit;
|
||||||
|
Encoder *encP = &EncoderInit;
|
||||||
|
|
||||||
|
// #include "Stepper.h"
|
||||||
|
#define INDEX_PIN PA2
|
||||||
|
HardwareSerial Serial1(PA10, PA9);
|
||||||
|
_Objects Obj;
|
||||||
|
|
||||||
|
void indexPulse(void);
|
||||||
|
double PosScaleRes = 1.0;
|
||||||
|
uint32_t CurPosScale = 1;
|
||||||
|
uint8_t OldLatchCEnable = 0;
|
||||||
|
volatile uint8_t indexPulseFired = 0;
|
||||||
|
uint32_t nFires = 0;
|
||||||
|
volatile uint8_t pleaseZeroTheCounter = 0;
|
||||||
|
uint32_t PrevTime = 0, Prev2Time = 0;
|
||||||
|
|
||||||
|
void cb_set_outputs(void) // Master outputs gets here, slave inputs, first operation
|
||||||
|
{
|
||||||
|
if (Obj.IndexLatchEnable && !OldLatchCEnable) // Should only happen first time IndexCEnable is set
|
||||||
|
{
|
||||||
|
pleaseZeroTheCounter = 1;
|
||||||
|
}
|
||||||
|
OldLatchCEnable = Obj.IndexLatchEnable;
|
||||||
|
|
||||||
|
if (CurPosScale != Obj.EncPosScale && Obj.EncPosScale != 0)
|
||||||
|
{
|
||||||
|
CurPosScale = Obj.EncPosScale;
|
||||||
|
PosScaleRes = 1.0 / double(CurPosScale);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void cb_get_inputs(void) // Set Master inputs, slave outputs, last operation
|
||||||
|
{
|
||||||
|
Obj.IndexStatus = 0;
|
||||||
|
if (indexPulseFired)
|
||||||
|
{
|
||||||
|
Obj.IndexStatus = 1;
|
||||||
|
indexPulseFired = 0;
|
||||||
|
nFires++;
|
||||||
|
PreviousEncoderCounterValue = 0;
|
||||||
|
}
|
||||||
|
uint64_t now = micros(); // Exploring the cycle times
|
||||||
|
Obj.DiffT = now - Prev2Time;
|
||||||
|
Prev2Time = PrevTime;
|
||||||
|
PrevTime = now;
|
||||||
|
|
||||||
|
int64_t pos = unwrap_encoder(TIM2->CNT, &PreviousEncoderCounterValue);
|
||||||
|
double CurPos = pos * PosScaleRes;
|
||||||
|
Obj.EncPos = CurPos;
|
||||||
|
|
||||||
|
double diffT = 0;
|
||||||
|
double diffPos = 0;
|
||||||
|
TDelta.push(ESCvar.Time); // Running average over the length of the circular buffer
|
||||||
|
Pos.push(CurPos);
|
||||||
|
if (Pos.size() >= 2)
|
||||||
|
{
|
||||||
|
diffT = 1.0e-9 * (TDelta.last() - TDelta.first()); // Time is in nanoseconds
|
||||||
|
diffPos = fabs(Pos.last() - Pos.first());
|
||||||
|
}
|
||||||
|
Obj.EncFrequency = diffT != 0 ? diffPos / diffT : 0.0; // Revolutions per second
|
||||||
|
|
||||||
|
Obj.IndexByte = digitalRead(INDEX_PIN);
|
||||||
|
if (Obj.IndexByte)
|
||||||
|
Serial1.printf("IS 1\n");
|
||||||
|
}
|
||||||
|
|
||||||
|
static esc_cfg_t config =
|
||||||
|
{
|
||||||
|
.user_arg = NULL,
|
||||||
|
.use_interrupt = 0,
|
||||||
|
.watchdog_cnt = 150,
|
||||||
|
.set_defaults_hook = NULL,
|
||||||
|
.pre_state_change_hook = NULL,
|
||||||
|
.post_state_change_hook = NULL,
|
||||||
|
.application_hook = NULL, // StepGen,
|
||||||
|
.safeoutput_override = NULL,
|
||||||
|
.pre_object_download_hook = NULL,
|
||||||
|
.post_object_download_hook = NULL,
|
||||||
|
.rxpdo_override = NULL,
|
||||||
|
.txpdo_override = NULL,
|
||||||
|
.esc_hw_interrupt_enable = NULL,
|
||||||
|
.esc_hw_interrupt_disable = NULL,
|
||||||
|
.esc_hw_eep_handler = NULL,
|
||||||
|
.esc_check_dc_handler = NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
void setup(void)
|
||||||
|
{
|
||||||
|
Serial1.begin(115200);
|
||||||
|
rcc_config();
|
||||||
|
|
||||||
|
// Set starting count value
|
||||||
|
EncoderInit.SetCount(Tim2, 0);
|
||||||
|
// EncoderInit.SetCount(Tim3, 0);
|
||||||
|
// EncoderInit.SetCount(Tim4, 0);
|
||||||
|
// EncoderInit.SetCount(Tim8, 0);
|
||||||
|
|
||||||
|
ecat_slv_init(&config);
|
||||||
|
attachInterrupt(digitalPinToInterrupt(INDEX_PIN), indexPulse, RISING); // Always when Index triggered
|
||||||
|
}
|
||||||
|
|
||||||
|
void loop(void)
|
||||||
|
{
|
||||||
|
ESCvar.PrevTime = ESCvar.Time;
|
||||||
|
ecat_slv();
|
||||||
|
}
|
||||||
|
|
||||||
|
#define ONE_PERIOD 65536
|
||||||
|
#define HALF_PERIOD 32768
|
||||||
|
|
||||||
|
int64_t unwrap_encoder(uint16_t in, int64_t *prev)
|
||||||
|
{
|
||||||
|
int64_t c64 = (int32_t)in - HALF_PERIOD; // remove half period to determine (+/-) sign of the wrap
|
||||||
|
int64_t dif = (c64 - *prev); // core concept: prev + (current - prev) = current
|
||||||
|
|
||||||
|
// wrap difference from -HALF_PERIOD to HALF_PERIOD. modulo prevents differences after the wrap from having an incorrect result
|
||||||
|
int64_t mod_dif = ((dif + HALF_PERIOD) % ONE_PERIOD) - HALF_PERIOD;
|
||||||
|
if (dif < -HALF_PERIOD)
|
||||||
|
mod_dif += ONE_PERIOD; // account for mod of negative number behavior in C
|
||||||
|
|
||||||
|
int64_t unwrapped = *prev + mod_dif;
|
||||||
|
*prev = unwrapped; // load previous value
|
||||||
|
|
||||||
|
return unwrapped + HALF_PERIOD; // remove the shift we applied at the beginning, and return
|
||||||
|
}
|
||||||
|
|
||||||
|
void indexPulse(void)
|
||||||
|
{
|
||||||
|
if (pleaseZeroTheCounter)
|
||||||
|
{
|
||||||
|
TIM2->CNT = 0;
|
||||||
|
indexPulseFired = 1;
|
||||||
|
Pos.clear();
|
||||||
|
TDelta.clear();
|
||||||
|
pleaseZeroTheCounter = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
@@ -64,7 +64,7 @@
|
|||||||
39,
|
39,
|
||||||
40
|
40
|
||||||
],
|
],
|
||||||
"visible_layers": "002202b_80000005",
|
"visible_layers": "002202a_00000001",
|
||||||
"zone_display_mode": 0
|
"zone_display_mode": 0
|
||||||
},
|
},
|
||||||
"meta": {
|
"meta": {
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user