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2
Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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1d8adf2147 | ||
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4c4aa7aab1 |
No files matched your search
@@ -3,4 +3,3 @@
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.vscode/c_cpp_properties.json
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.vscode/launch.json
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.vscode/ipch
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Octave
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@@ -1,37 +0,0 @@
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#ifndef MYENCODER
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#define MYENCODER
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#include "Stm32F4_Encoder.h"
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#include <CircularBuffer.h>
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#define RINGBUFFERLEN 101
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class MyEncoder
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{
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public:
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MyEncoder(TIM_TypeDef *_tim_base, uint8_t _indexPin, void irq(void));
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int64_t unwrapEncoder(uint16_t in);
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void indexPulse(void);
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uint8_t indexHappened();
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double currentPos();
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double frequency(uint64_t time);
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uint8_t getIndexState();
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void setScale(double scale);
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void setLatch(uint8_t latchEnable);
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private:
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int64_t previousEncoderCounterValue = 0;
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double PosScaleRes = 1.0;
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uint32_t CurPosScale = 1;
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uint8_t oldLatchCEnable = 0;
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volatile uint8_t indexPulseFired = 0;
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volatile uint8_t pleaseZeroTheCounter = 0;
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Encoder EncoderInit;
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uint8_t indexPin;
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CircularBuffer<double_t, RINGBUFFERLEN> Pos;
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CircularBuffer<uint32_t, RINGBUFFERLEN> TDelta;
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double curPos;
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TIM_TypeDef *tim_base;
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};
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#endif
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@@ -1,42 +0,0 @@
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#ifndef STEPGEN
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#define STEPGEN
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#include <HardwareTimer.h>
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class StepGen
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{
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private:
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volatile uint8_t timerIsRunning;
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volatile int32_t timerStepPosition;
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volatile int32_t timerStepDirection;
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volatile int32_t timerStepPositionAtEnd;
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volatile int32_t timerNewEndStepPosition;
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volatile uint32_t timerNewCycleTime;
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volatile double_t actualPosition;
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volatile double_t requestedPosition;
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volatile uint8_t enabled;
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HardwareTimer *MyTim;
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uint16_t stepsPerMM;
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uint8_t dirPin;
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PinName stepPin;
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uint32_t timerChan;
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const uint32_t maxFreq = 100000;
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volatile uint32_t prevFreq1 = 0;
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volatile uint32_t prevFreq2 = 0;
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public:
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static uint32_t sync0CycleTime;
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volatile uint32_t pwmCycleTime;
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StepGen(TIM_TypeDef *Timer, uint32_t timerChannel, PinName stepPin, uint8_t dirPin, void irq(void));
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void reqPos(double_t pos);
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double reqPos();
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void actPos(double_t pos);
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double actPos();
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void handleStepper(void);
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void timerCB();
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void setScale(int16_t spm);
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void enable(uint8_t yes);
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};
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#endif
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@@ -1,651 +0,0 @@
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#ifndef __Stm32F4_Encoder_H__
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#define __Stm32F4_Encoder_H__
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#include <Arduino.h>
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#define GPIO_Speed_50MHz 0x02 /*!< Fast speed */
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// #define GPIO_MODER_MODER0 ((uint32_t)0x00000003)
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#define GPIO_Mode_OUT 0x01
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// #define GPIO_OSPEEDER_OSPEEDR0 ((uint32_t)0x00000003)
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// #define GPIO_OTYPER_OT_0 ((uint32_t)0x00000001)
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// #define GPIO_PUPDR_PUPDR0 ((uint32_t)0x00000003)
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#define GPIO_PuPd_NOPULL 0x00
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#define GPIO_Mode_AF 0x02
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#define GPIO_OType_PP 0x00
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#define GPIO_PuPd_NOPULL 0x00
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#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
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#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
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#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
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#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
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#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
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#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
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#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
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#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
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#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */
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#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */
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#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */
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#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */
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#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */
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#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */
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#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */
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#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */
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#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
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typedef struct TIM_TimeBaseInitTypeDef
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{
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uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
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This parameter can be a number between 0x0000 and 0xFFFF */
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uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
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This parameter can be a value of @ref TIM_Counter_Mode */
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uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
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Auto-Reload Register at the next update event.
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This parameter must be a number between 0x0000 and 0xFFFF. */
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uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
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This parameter can be a value of @ref TIM_Clock_Division_CKD */
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uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
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reaches zero, an update event is generated and counting restarts
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from the RCR value (N).
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This means in PWM mode that (N+1) corresponds to:
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- the number of PWM periods in edge-aligned mode
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- the number of half PWM period in center-aligned mode
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This parameter must be a number between 0x00 and 0xFF.
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@note This parameter is valid only for TIM1 and TIM8. */
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} TIM_TimeBaseInitTypeDef;
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typedef struct
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{
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uint16_t setcount;
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} encoder;
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typedef struct
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{
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uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
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This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
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uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
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This parameter can be a value of @ref TIM_Output_Compare_State */
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uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
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This parameter can be a value of @ref TIM_Output_Compare_N_State
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@note This parameter is valid only for TIM1 and TIM8. */
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uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
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This parameter can be a number between 0x0000 and 0xFFFF */
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uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
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This parameter can be a value of @ref TIM_Output_Compare_Polarity */
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uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
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This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
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@note This parameter is valid only for TIM1 and TIM8. */
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uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
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This parameter can be a value of @ref TIM_Output_Compare_Idle_State
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@note This parameter is valid only for TIM1 and TIM8. */
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uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
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This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
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@note This parameter is valid only for TIM1 and TIM8. */
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} TIM_OCInitTypeDef;
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typedef struct
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{
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uint16_t TIM_Channel; /*!< Specifies the TIM channel.
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This parameter can be a value of @ref TIM_Channel */
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uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
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This parameter can be a value of @ref TIM_Input_Capture_Polarity */
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uint16_t TIM_ICSelection; /*!< Specifies the input.
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This parameter can be a value of @ref TIM_Input_Capture_Selection */
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uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
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This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
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uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
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This parameter can be a number between 0x0 and 0xF */
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} TIM_ICInitTypeDef;
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typedef struct
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{
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uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
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This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
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uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
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This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
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uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
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This parameter can be a value of @ref TIM_Lock_level */
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uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
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switching-on of the outputs.
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This parameter can be a number between 0x00 and 0xFF */
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uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
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This parameter can be a value of @ref TIM_Break_Input_enable_disable */
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uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
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This parameter can be a value of @ref TIM_Break_Polarity */
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uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
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This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
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} TIM_BDTRInitTypeDef;
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#define GPIO_PinSource0 ((uint8_t)0x00)
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#define GPIO_PinSource1 ((uint8_t)0x01)
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#define GPIO_PinSource2 ((uint8_t)0x02)
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#define GPIO_PinSource3 ((uint8_t)0x03)
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#define GPIO_PinSource4 ((uint8_t)0x04)
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#define GPIO_PinSource5 ((uint8_t)0x05)
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#define GPIO_PinSource6 ((uint8_t)0x06)
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#define GPIO_PinSource7 ((uint8_t)0x07)
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#define GPIO_PinSource8 ((uint8_t)0x08)
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#define GPIO_PinSource9 ((uint8_t)0x09)
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#define GPIO_PinSource10 ((uint8_t)0x0A)
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#define GPIO_PinSource11 ((uint8_t)0x0B)
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#define GPIO_PinSource12 ((uint8_t)0x0C)
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#define GPIO_PinSource13 ((uint8_t)0x0D)
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#define GPIO_PinSource14 ((uint8_t)0x0E)
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#define GPIO_PinSource15 ((uint8_t)0x0F)
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#define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
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#define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
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#define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
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#define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
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#define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
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#define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
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// #define TIM4 ((TIM_TypeDef *)TIM4_BASE)
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// #define TIM8 ((TIM_TypeDef *)TIM8_BASE)
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#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
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#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
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#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
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// #define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
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// #define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
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#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
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((PERIPH) == TIM2) || \
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((PERIPH) == TIM3) || \
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((PERIPH) == TIM4) || \
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((PERIPH) == TIM5) || \
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((PERIPH) == TIM6) || \
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((PERIPH) == TIM7) || \
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((PERIPH) == TIM8) || \
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((PERIPH) == TIM9) || \
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((PERIPH) == TIM10) || \
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((PERIPH) == TIM11) || \
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((PERIPH) == TIM12) || \
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(((PERIPH) == TIM13) || \
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((PERIPH) == TIM14)))
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#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
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((PERIPH) == TIM2) || \
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((PERIPH) == TIM3) || \
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((PERIPH) == TIM4) || \
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((PERIPH) == TIM5) || \
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((PERIPH) == TIM8) || \
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((PERIPH) == TIM9) || \
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((PERIPH) == TIM10) || \
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((PERIPH) == TIM11) || \
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((PERIPH) == TIM12) || \
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((PERIPH) == TIM13) || \
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((PERIPH) == TIM14))
|
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|
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#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
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((PERIPH) == TIM2) || \
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((PERIPH) == TIM3) || \
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((PERIPH) == TIM4) || \
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((PERIPH) == TIM5) || \
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((PERIPH) == TIM8) || \
|
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((PERIPH) == TIM9) || \
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((PERIPH) == TIM12))
|
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|
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#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
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((PERIPH) == TIM2) || \
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((PERIPH) == TIM3) || \
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((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM8))
|
||||
|
||||
#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
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||||
((PERIPH) == TIM8))
|
||||
|
||||
#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
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((PERIPH) == TIM2) || \
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||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM6) || \
|
||||
((PERIPH) == TIM7) || \
|
||||
((PERIPH) == TIM8))
|
||||
|
||||
#define IS_TIM_LIST6_PERIPH(TIMx) (((TIMx) == TIM2) || \
|
||||
((TIMx) == TIM5) || \
|
||||
((TIMx) == TIM11))
|
||||
|
||||
#define TIM_OCMode_Timing ((uint16_t)0x0000)
|
||||
#define TIM_OCMode_Active ((uint16_t)0x0010)
|
||||
#define TIM_OCMode_Inactive ((uint16_t)0x0020)
|
||||
#define TIM_OCMode_Toggle ((uint16_t)0x0030)
|
||||
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
|
||||
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
|
||||
//#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||
// ((MODE) == TIM_OCMode_Active) || \
|
||||
// ((MODE) == TIM_OCMode_Inactive) || \
|
||||
// ((MODE) == TIM_OCMode_Toggle)|| \
|
||||
// ((MODE) == TIM_OCMode_PWM1) || \
|
||||
// ((MODE) == TIM_OCMode_PWM2))
|
||||
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||
((MODE) == TIM_OCMode_Active) || \
|
||||
((MODE) == TIM_OCMode_Inactive) || \
|
||||
((MODE) == TIM_OCMode_Toggle) || \
|
||||
((MODE) == TIM_OCMode_PWM1) || \
|
||||
((MODE) == TIM_OCMode_PWM2) || \
|
||||
((MODE) == TIM_ForcedAction_Active) || \
|
||||
((MODE) == TIM_ForcedAction_InActive))
|
||||
|
||||
#define TIM_OPMode_Single ((uint16_t)0x0008)
|
||||
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
|
||||
// ((MODE) == TIM_OPMode_Repetitive))
|
||||
|
||||
#define TIM_Channel_1 ((uint16_t)0x0000)
|
||||
#define TIM_Channel_2 ((uint16_t)0x0004)
|
||||
#define TIM_Channel_3 ((uint16_t)0x0008)
|
||||
#define TIM_Channel_4 ((uint16_t)0x000C)
|
||||
|
||||
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2) || \
|
||||
((CHANNEL) == TIM_Channel_3) || \
|
||||
((CHANNEL) == TIM_Channel_4))
|
||||
|
||||
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2))
|
||||
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2) || \
|
||||
((CHANNEL) == TIM_Channel_3))
|
||||
|
||||
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
|
||||
#define TIM_CKD_DIV2 ((uint16_t)0x0100)
|
||||
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
|
||||
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
|
||||
((DIV) == TIM_CKD_DIV2) || \
|
||||
((DIV) == TIM_CKD_DIV4))
|
||||
|
||||
#define TIM_CounterMode_Up ((uint16_t)0x0000)
|
||||
#define TIM_CounterMode_Down ((uint16_t)0x0010)
|
||||
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
|
||||
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
|
||||
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
|
||||
//#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
|
||||
// ((MODE) == TIM_CounterMode_Down) || \
|
||||
// ((MODE) == TIM_CounterMode_CenterAligned1) || \
|
||||
// ((MODE) == TIM_CounterMode_CenterAligned2) || \
|
||||
// ((MODE) == TIM_CounterMode_CenterAligned3))
|
||||
|
||||
#define TIM_OCPolarity_High ((uint16_t)0x0000)
|
||||
#define TIM_OCPolarity_Low ((uint16_t)0x0002)
|
||||
//#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
|
||||
// ((POLARITY) == TIM_OCPolarity_Low))
|
||||
|
||||
#define TIM_OCNPolarity_High ((uint16_t)0x0000)
|
||||
#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
|
||||
//#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
|
||||
// ((POLARITY) == TIM_OCNPolarity_Low))
|
||||
|
||||
#define TIM_OutputState_Disable ((uint16_t)0x0000)
|
||||
#define TIM_OutputState_Enable ((uint16_t)0x0001)
|
||||
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
|
||||
((STATE) == TIM_OutputState_Enable))
|
||||
|
||||
#define TIM_OutputNState_Disable ((uint16_t)0x0000)
|
||||
#define TIM_OutputNState_Enable ((uint16_t)0x0004)
|
||||
#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
|
||||
((STATE) == TIM_OutputNState_Enable))
|
||||
|
||||
#define TIM_CCx_Enable ((uint16_t)0x0001)
|
||||
#define TIM_CCx_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
|
||||
((CCX) == TIM_CCx_Disable))
|
||||
|
||||
#define TIM_CCxN_Enable ((uint16_t)0x0004)
|
||||
#define TIM_CCxN_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
|
||||
((CCXN) == TIM_CCxN_Disable))
|
||||
|
||||
#define TIM_Break_Enable ((uint16_t)0x1000)
|
||||
#define TIM_Break_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
|
||||
// ((STATE) == TIM_Break_Disable))
|
||||
|
||||
#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
|
||||
#define TIM_BreakPolarity_High ((uint16_t)0x2000)
|
||||
//#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
|
||||
// ((POLARITY) == TIM_BreakPolarity_High))
|
||||
|
||||
#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
|
||||
#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
|
||||
// ((STATE) == TIM_AutomaticOutput_Disable))
|
||||
|
||||
#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
|
||||
#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
|
||||
#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
|
||||
#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
|
||||
//#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
|
||||
// ((LEVEL) == TIM_LOCKLevel_1) || \
|
||||
// ((LEVEL) == TIM_LOCKLevel_2) || \
|
||||
// ((LEVEL) == TIM_LOCKLevel_3))
|
||||
|
||||
#define TIM_OSSIState_Enable ((uint16_t)0x0400)
|
||||
#define TIM_OSSIState_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
|
||||
// ((STATE) == TIM_OSSIState_Disable))
|
||||
|
||||
#define TIM_OSSRState_Enable ((uint16_t)0x0800)
|
||||
#define TIM_OSSRState_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
|
||||
// ((STATE) == TIM_OSSRState_Disable))
|
||||
|
||||
#define TIM_OCIdleState_Set ((uint16_t)0x0100)
|
||||
#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
|
||||
// ((STATE) == TIM_OCIdleState_Reset))
|
||||
//
|
||||
|
||||
#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
|
||||
#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
|
||||
// ((STATE) == TIM_OCNIdleState_Reset))
|
||||
|
||||
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
||||
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
||||
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
|
||||
//#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
||||
// ((POLARITY) == TIM_ICPolarity_Falling)|| \
|
||||
// ((POLARITY) == TIM_ICPolarity_BothEdge))
|
||||
|
||||
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be \
|
||||
connected to IC1, IC2, IC3 or IC4, respectively */
|
||||
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be \
|
||||
connected to IC2, IC1, IC4 or IC3, respectively. */
|
||||
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
|
||||
//#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
|
||||
// ((SELECTION) == TIM_ICSelection_IndirectTI) || \
|
||||
// ((SELECTION) == TIM_ICSelection_TRC))
|
||||
|
||||
// #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
|
||||
// #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
|
||||
// #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
|
||||
// #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
|
||||
// #define IS_TIM_IC_PRESCALER(PRESCALER) ( ((PRESCALER) == TIM_ICPSC_DIV1) || \
|
||||
// ((PRESCALER) == TIM_ICPSC_DIV2) || \
|
||||
// ((PRESCALER) == TIM_ICPSC_DIV4) || \
|
||||
// ((PRESCALER) == TIM_ICPSC_DIV8))
|
||||
|
||||
#define TIM_IT_Update ((uint16_t)0x0001)
|
||||
// #define TIM_IT_CC1 ((uint16_t)0x0002)
|
||||
// #define TIM_IT_CC2 ((uint16_t)0x0004)
|
||||
// #define TIM_IT_CC3 ((uint16_t)0x0008)
|
||||
// #define TIM_IT_CC4 ((uint16_t)0x0010)
|
||||
// #define TIM_IT_COM ((uint16_t)0x0020)
|
||||
#define TIM_IT_Trigger ((uint16_t)0x0040)
|
||||
#define TIM_IT_Break ((uint16_t)0x0080)
|
||||
#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
|
||||
|
||||
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
|
||||
((IT) == TIM_IT_CC1) || \
|
||||
((IT) == TIM_IT_CC2) || \
|
||||
((IT) == TIM_IT_CC3) || \
|
||||
((IT) == TIM_IT_CC4) || \
|
||||
((IT) == TIM_IT_COM) || \
|
||||
((IT) == TIM_IT_Trigger) || \
|
||||
((IT) == TIM_IT_Break))
|
||||
|
||||
// #define TIM_DMABase_CR1 ((uint16_t)0x0000)
|
||||
// #define TIM_DMABase_CR2 ((uint16_t)0x0001)
|
||||
// #define TIM_DMABase_SMCR ((uint16_t)0x0002)
|
||||
// #define TIM_DMABase_DIER ((uint16_t)0x0003)
|
||||
// #define TIM_DMABase_SR ((uint16_t)0x0004)
|
||||
// #define TIM_DMABase_EGR ((uint16_t)0x0005)
|
||||
// #define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
|
||||
// #define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
|
||||
// #define TIM_DMABase_CCER ((uint16_t)0x0008)
|
||||
// #define TIM_DMABase_CNT ((uint16_t)0x0009)
|
||||
// #define TIM_DMABase_PSC ((uint16_t)0x000A)
|
||||
// #define TIM_DMABase_ARR ((uint16_t)0x000B)
|
||||
// #define TIM_DMABase_RCR ((uint16_t)0x000C)
|
||||
// #define TIM_DMABase_CCR1 ((uint16_t)0x000D)
|
||||
// #define TIM_DMABase_CCR2 ((uint16_t)0x000E)
|
||||
// #define TIM_DMABase_CCR3 ((uint16_t)0x000F)
|
||||
// #define TIM_DMABase_CCR4 ((uint16_t)0x0010)
|
||||
// #define TIM_DMABase_BDTR ((uint16_t)0x0011)
|
||||
// #define TIM_DMABase_DCR ((uint16_t)0x0012)
|
||||
// #define TIM_DMABase_OR ((uint16_t)0x0013)
|
||||
// #define IS_TIM_DMA_BASE(BASE) ( ((BASE) == TIM_DMABase_CR1) || \
|
||||
// ((BASE) == TIM_DMABase_CR2) || \
|
||||
// ((BASE) == TIM_DMABase_SMCR) || \
|
||||
// ((BASE) == TIM_DMABase_DIER) || \
|
||||
// ((BASE) == TIM_DMABase_SR) || \
|
||||
// ((BASE) == TIM_DMABase_EGR) || \
|
||||
// ((BASE) == TIM_DMABase_CCMR1) || \
|
||||
// ((BASE) == TIM_DMABase_CCMR2) || \
|
||||
// ((BASE) == TIM_DMABase_CCER) || \
|
||||
// ((BASE) == TIM_DMABase_CNT) || \
|
||||
// ((BASE) == TIM_DMABase_PSC) || \
|
||||
// ((BASE) == TIM_DMABase_ARR) || \
|
||||
// ((BASE) == TIM_DMABase_RCR) || \
|
||||
// ((BASE) == TIM_DMABase_CCR1) || \
|
||||
// ((BASE) == TIM_DMABase_CCR2) || \
|
||||
// ((BASE) == TIM_DMABase_CCR3) || \
|
||||
// ((BASE) == TIM_DMABase_CCR4) || \
|
||||
// ((BASE) == TIM_DMABase_BDTR) || \
|
||||
// ((BASE) == TIM_DMABase_DCR) || \
|
||||
// ((BASE) == TIM_DMABase_OR))
|
||||
|
||||
// #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
|
||||
// #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
|
||||
// #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
|
||||
// #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
|
||||
// #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
|
||||
// #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
|
||||
// #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
|
||||
// #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
|
||||
// #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
|
||||
// #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
|
||||
// #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
|
||||
// #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
|
||||
// #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
|
||||
// #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
|
||||
// #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
|
||||
// #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
|
||||
// #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
|
||||
// #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
|
||||
// #define IS_TIM_DMA_LENGTH(LENGTH) ( ((LENGTH) == TIM_DMABurstLength_1Transfer) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_18Transfers))
|
||||
|
||||
// #define TIM_DMA_Update ((uint16_t)0x0100)
|
||||
// #define TIM_DMA_CC1 ((uint16_t)0x0200)
|
||||
// #define TIM_DMA_CC2 ((uint16_t)0x0400)
|
||||
// #define TIM_DMA_CC3 ((uint16_t)0x0800)
|
||||
// #define TIM_DMA_CC4 ((uint16_t)0x1000)
|
||||
// #define TIM_DMA_COM ((uint16_t)0x2000)
|
||||
// #define TIM_DMA_Trigger ((uint16_t)0x4000)
|
||||
// #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
|
||||
|
||||
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
|
||||
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
|
||||
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
|
||||
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
|
||||
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV8))
|
||||
|
||||
// #define TIM_TS_ITR0 ((uint16_t)0x0000)
|
||||
// #define TIM_TS_ITR1 ((uint16_t)0x0010)
|
||||
// #define TIM_TS_ITR2 ((uint16_t)0x0020)
|
||||
// #define TIM_TS_ITR3 ((uint16_t)0x0030)
|
||||
// #define TIM_TS_TI1F_ED ((uint16_t)0x0040)
|
||||
// #define TIM_TS_TI1FP1 ((uint16_t)0x0050)
|
||||
// #define TIM_TS_TI2FP2 ((uint16_t)0x0060)
|
||||
// #define TIM_TS_ETRF ((uint16_t)0x0070)
|
||||
// #def ine IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||
// ((SELECTION) == TIM_TS_ITR1) || \
|
||||
// ((SELECTION) == TIM_TS_ITR2) || \
|
||||
// ((SELECTION) == TIM_TS_ITR3) || \
|
||||
// ((SELECTION) == TIM_TS_TI1F_ED) || \
|
||||
// ((SELECTION) == TIM_TS_TI1FP1) || \
|
||||
// ((SELECTION) == TIM_TS_TI2FP2) || \
|
||||
// ((SELECTION) == TIM_TS_ETRF))
|
||||
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||
((SELECTION) == TIM_TS_ITR1) || \
|
||||
((SELECTION) == TIM_TS_ITR2) || \
|
||||
((SELECTION) == TIM_TS_ITR3))
|
||||
|
||||
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
|
||||
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
|
||||
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
|
||||
|
||||
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
|
||||
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
|
||||
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
|
||||
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
|
||||
|
||||
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
|
||||
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
|
||||
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
|
||||
((RELOAD) == TIM_PSCReloadMode_Immediate))
|
||||
|
||||
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
|
||||
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
|
||||
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
|
||||
((ACTION) == TIM_ForcedAction_InActive))
|
||||
|
||||
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
|
||||
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
|
||||
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
||||
//#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
|
||||
// ((MODE) == TIM_EncoderMode_TI2) || \
|
||||
// ((MODE) == TIM_EncoderMode_TI12))
|
||||
|
||||
// #define TIM_EventSource_Update ((uint16_t)0x0001)
|
||||
// #define TIM_EventSource_CC1 ((uint16_t)0x0002)
|
||||
// #define TIM_EventSource_CC2 ((uint16_t)0x0004)
|
||||
// #define TIM_EventSource_CC3 ((uint16_t)0x0008)
|
||||
// #define TIM_EventSource_CC4 ((uint16_t)0x0010)
|
||||
// #define TIM_EventSource_COM ((uint16_t)0x0020)
|
||||
// #define TIM_EventSource_Trigger ((uint16_t)0x0040)
|
||||
// #define TIM_EventSource_Break ((uint16_t)0x0080)
|
||||
// #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
|
||||
|
||||
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow \
|
||||
or the setting of UG bit, or an update generation \
|
||||
through the slave mode controller. */
|
||||
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
|
||||
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
|
||||
((SOURCE) == TIM_UpdateSource_Regular))
|
||||
|
||||
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
|
||||
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
|
||||
((STATE) == TIM_OCPreload_Disable))
|
||||
|
||||
#define TIM_OCFast_Enable ((uint16_t)0x0004)
|
||||
#define TIM_OCFast_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
|
||||
((STATE) == TIM_OCFast_Disable))
|
||||
|
||||
#define TIM_OCClear_Enable ((uint16_t)0x0080)
|
||||
#define TIM_OCClear_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
|
||||
((STATE) == TIM_OCClear_Disable))
|
||||
|
||||
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
|
||||
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
|
||||
#define TIM_TRGOSource_Update ((uint16_t)0x0020)
|
||||
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
|
||||
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
|
||||
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
|
||||
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
|
||||
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
|
||||
//#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_Enable) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_Update) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC1) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC4Ref))
|
||||
|
||||
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
|
||||
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
|
||||
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
|
||||
#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
|
||||
//#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
|
||||
// ((MODE) == TIM_SlaveMode_Gated) || \
|
||||
// ((MODE) == TIM_SlaveMode_Trigger) || \
|
||||
// ((MODE) == TIM_SlaveMode_External1))
|
||||
|
||||
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
|
||||
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
|
||||
// ((STATE) == TIM_MasterSlaveMode_Disable))
|
||||
|
||||
#define TIM2_TIM8_TRGO ((uint16_t)0x0000)
|
||||
#define TIM2_ETH_PTP ((uint16_t)0x0400)
|
||||
#define TIM2_USBFS_SOF ((uint16_t)0x0800)
|
||||
#define TIM2_USBHS_SOF ((uint16_t)0x0C00)
|
||||
|
||||
#define TIM5_GPIO ((uint16_t)0x0000)
|
||||
#define TIM5_LSI ((uint16_t)0x0040)
|
||||
#define TIM5_LSE ((uint16_t)0x0080)
|
||||
#define TIM5_RTC ((uint16_t)0x00C0)
|
||||
|
||||
#define TIM11_GPIO ((uint16_t)0x0000)
|
||||
#define TIM11_HSE ((uint16_t)0x0002)
|
||||
|
||||
class Encoder
|
||||
{
|
||||
private:
|
||||
int _pin;
|
||||
|
||||
public:
|
||||
TIM_TypeDef *tim_base;
|
||||
Encoder();
|
||||
void SetCount(int64_t Counter);
|
||||
uint16_t GetCount();
|
||||
};
|
||||
|
||||
void rcc_config();
|
||||
void GpioConfigPortA(GPIO_TypeDef *GPIOx);
|
||||
void GpioConfigPortC(GPIO_TypeDef *GPIOx);
|
||||
void GpioConfigPortD(GPIO_TypeDef *GPIOx);
|
||||
void TIM_EncoderInterConfig(TIM_TypeDef *TIMx, uint16_t TIM_EncoderMode, uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
|
||||
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct);
|
||||
void TIM_TimeBaseInit(TIM_TypeDef *TIMx, TIM_TimeBaseInitTypeDef *TIM_TimeBaseInitStruct);
|
||||
#endif
|
||||
@@ -1,94 +0,0 @@
|
||||
#include "MyENcoder.h"
|
||||
|
||||
MyEncoder::MyEncoder(TIM_TypeDef *_tim_base, uint8_t _indexPin, void irq(void))
|
||||
{
|
||||
tim_base = _tim_base;
|
||||
indexPin = _indexPin;
|
||||
attachInterrupt(digitalPinToInterrupt(indexPin), irq, RISING); // When Index triggered
|
||||
EncoderInit.SetCount(0);
|
||||
}
|
||||
|
||||
#define ONE_PERIOD 65536
|
||||
#define HALF_PERIOD 32768
|
||||
|
||||
int64_t MyEncoder::unwrapEncoder(uint16_t in)
|
||||
{
|
||||
int32_t c32 = (int32_t)in - HALF_PERIOD; // remove half period to determine (+/-) sign of the wrap
|
||||
int32_t dif = (c32 - previousEncoderCounterValue); // core concept: prev + (current - prev) = current
|
||||
|
||||
// wrap difference from -HALF_PERIOD to HALF_PERIOD. modulo prevents differences after the wrap from having an incorrect result
|
||||
int32_t mod_dif = ((dif + HALF_PERIOD) % ONE_PERIOD) - HALF_PERIOD;
|
||||
if (dif < -HALF_PERIOD)
|
||||
mod_dif += ONE_PERIOD; // account for mod of negative number behavior in C
|
||||
|
||||
int64_t unwrapped = previousEncoderCounterValue + mod_dif;
|
||||
previousEncoderCounterValue = unwrapped; // load previous value
|
||||
|
||||
return unwrapped + HALF_PERIOD; // remove the shift we applied at the beginning, and return
|
||||
}
|
||||
|
||||
void MyEncoder::indexPulse(void)
|
||||
{
|
||||
if (pleaseZeroTheCounter)
|
||||
{
|
||||
tim_base->CNT = 0;
|
||||
indexPulseFired = 1;
|
||||
Pos.clear();
|
||||
TDelta.clear();
|
||||
pleaseZeroTheCounter = 0;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t MyEncoder::indexHappened()
|
||||
{
|
||||
if (indexPulseFired)
|
||||
{
|
||||
indexPulseFired = 0;
|
||||
previousEncoderCounterValue = 0;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
double MyEncoder::currentPos()
|
||||
{
|
||||
curPos = unwrapEncoder(tim_base->CNT) * PosScaleRes;
|
||||
return curPos;
|
||||
}
|
||||
|
||||
double MyEncoder::frequency(uint64_t time)
|
||||
{
|
||||
|
||||
double diffT = 0;
|
||||
double diffPos = 0;
|
||||
TDelta.push(time); // Running average over the length of the circular buffer
|
||||
Pos.push(curPos);
|
||||
if (Pos.size() >= 2)
|
||||
{
|
||||
diffT = 1.0e-9 * (TDelta.last() - TDelta.first()); // Time is in nanoseconds
|
||||
diffPos = fabs(Pos.last() - Pos.first());
|
||||
}
|
||||
return diffT != 0 ? diffPos / diffT : 0.0; // Revolutions per second
|
||||
}
|
||||
uint8_t MyEncoder::getIndexState()
|
||||
{
|
||||
return digitalRead(indexPin);
|
||||
}
|
||||
|
||||
void MyEncoder::setScale(double scale)
|
||||
{
|
||||
if (CurPosScale != scale && scale != 0)
|
||||
{
|
||||
CurPosScale = scale;
|
||||
PosScaleRes = 1.0 / double(scale);
|
||||
}
|
||||
}
|
||||
|
||||
void MyEncoder::setLatch(uint8_t latchEnable)
|
||||
{
|
||||
if (latchEnable && !oldLatchCEnable) // Should only happen first time IndexCEnable is set
|
||||
{
|
||||
pleaseZeroTheCounter = 1;
|
||||
}
|
||||
oldLatchCEnable = latchEnable;
|
||||
}
|
||||
@@ -1,148 +0,0 @@
|
||||
#include <Arduino.h>
|
||||
#include <stdio.h>
|
||||
#include "StepGen.h"
|
||||
|
||||
StepGen::StepGen(TIM_TypeDef *Timer, uint32_t _timerChannel, PinName _stepPin, uint8_t _dirPin, void irq(void))
|
||||
{
|
||||
timerIsRunning = 0;
|
||||
timerStepPosition = 0;
|
||||
timerStepDirection = 0;
|
||||
timerStepPositionAtEnd = 0;
|
||||
timerNewEndStepPosition = 0;
|
||||
actualPosition = 0;
|
||||
requestedPosition = 0;
|
||||
stepsPerMM = 0;
|
||||
enabled = 0;
|
||||
|
||||
dirPin = _dirPin;
|
||||
stepPin = _stepPin;
|
||||
timerChan = _timerChannel;
|
||||
MyTim = new HardwareTimer(Timer);
|
||||
MyTim->attachInterrupt(irq);
|
||||
pinMode(dirPin, OUTPUT);
|
||||
}
|
||||
void StepGen::reqPos(double_t pos)
|
||||
{
|
||||
requestedPosition = pos;
|
||||
}
|
||||
double StepGen::reqPos()
|
||||
{
|
||||
return requestedPosition;
|
||||
}
|
||||
void StepGen::actPos(double pos)
|
||||
{
|
||||
actualPosition = pos;
|
||||
}
|
||||
double StepGen::actPos()
|
||||
{
|
||||
return actualPosition;
|
||||
}
|
||||
|
||||
void StepGen::enable(uint8_t yes)
|
||||
{
|
||||
enabled = yes;
|
||||
}
|
||||
|
||||
void StepGen::handleStepper(void)
|
||||
{
|
||||
if (!enabled)
|
||||
return;
|
||||
pwmCycleTime = StepGen::sync0CycleTime;
|
||||
|
||||
actPos(timerStepPosition / double(stepsPerMM));
|
||||
double diffPosition = reqPos() - actPos();
|
||||
#if 1
|
||||
// Wild "tone" kludge. map() function
|
||||
#define SPEED_MIN 0.00005
|
||||
#define SPEED_MAX 0.0005
|
||||
#define FACT_LOW 1.0
|
||||
#define FACT_HIGH 20.0
|
||||
if (abs(diffPosition) < SPEED_MIN) // 60 mm/min = 0.001 mm/ms
|
||||
{
|
||||
pwmCycleTime = FACT_LOW * StepGen::sync0CycleTime;
|
||||
}
|
||||
else if (abs(diffPosition) > SPEED_MAX) // 60 mm/min = 0.001 mm/ms
|
||||
{
|
||||
pwmCycleTime = FACT_HIGH * StepGen::sync0CycleTime;
|
||||
}
|
||||
else
|
||||
{
|
||||
pwmCycleTime = (FACT_LOW + (FACT_HIGH - FACT_LOW) * (abs(diffPosition) - SPEED_MIN) / (SPEED_MAX - SPEED_MIN)) * StepGen::sync0CycleTime;
|
||||
}
|
||||
#endif
|
||||
uint64_t fre = (abs(diffPosition) * stepsPerMM * 1000000) / pwmCycleTime; // Frequency needed
|
||||
if (fre > maxFreq) // Only do maxFre
|
||||
{
|
||||
double maxDist = (maxFreq * pwmCycleTime) / (stepsPerMM * 1000000.0) * (diffPosition > 0 ? 1 : -1);
|
||||
reqPos(actPos() + maxDist);
|
||||
}
|
||||
int32_t pulsesAtEndOfCycle = stepsPerMM * reqPos();
|
||||
|
||||
// Will be picked up by the timer_CB and the timer is reloaded, if it runs.
|
||||
timerNewEndStepPosition = pulsesAtEndOfCycle;
|
||||
|
||||
if (!timerIsRunning) // Timer isn't running. Start it here
|
||||
{
|
||||
int32_t steps = pulsesAtEndOfCycle - timerStepPosition; // Pulses to go + or -
|
||||
if (steps != 0)
|
||||
{
|
||||
if (steps > 0)
|
||||
{
|
||||
digitalWrite(dirPin, HIGH);
|
||||
timerStepDirection = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
digitalWrite(dirPin, LOW);
|
||||
timerStepDirection = -1;
|
||||
}
|
||||
timerStepPositionAtEnd = pulsesAtEndOfCycle; // Current Position
|
||||
float_t freqf = abs(steps) / (pwmCycleTime*1.0e-6);
|
||||
uint32_t freq = uint32_t(freqf);
|
||||
MyTim->setMode(timerChan, TIMER_OUTPUT_COMPARE_PWM2, stepPin);
|
||||
MyTim->setOverflow(freq, HERTZ_FORMAT);
|
||||
MyTim->setCaptureCompare(timerChan, 50, PERCENT_COMPARE_FORMAT); // 50 %
|
||||
timerIsRunning = 1;
|
||||
MyTim->resume();
|
||||
}
|
||||
}
|
||||
}
|
||||
void StepGen::timerCB()
|
||||
{
|
||||
timerStepPosition += timerStepDirection; // The step that was just completed
|
||||
if (timerNewEndStepPosition != 0) // Are we going to reload?
|
||||
{
|
||||
// Input for reload is timerNewEndStepPosition
|
||||
// The timer has current position and from this
|
||||
// can set new frequency and new endtarget for steps
|
||||
MyTim->pause(); // We are not at stop, let's stop it. Note stepPin is floating
|
||||
int32_t steps = timerNewEndStepPosition - timerStepPosition;
|
||||
if (steps != 0)
|
||||
{
|
||||
uint8_t sgn = steps > 0 ? HIGH : LOW;
|
||||
digitalWrite(dirPin, sgn);
|
||||
float_t freqf = abs(steps) / float(pwmCycleTime*1.0e-6);
|
||||
uint32_t freq = uint32_t(freqf);
|
||||
timerStepDirection = steps > 0 ? 1 : -1;
|
||||
timerStepPositionAtEnd = timerNewEndStepPosition;
|
||||
timerNewEndStepPosition = 0; // Set to zero to not reload next time
|
||||
MyTim->setMode(timerChan, TIMER_OUTPUT_COMPARE_PWM2, stepPin);
|
||||
MyTim->setOverflow(freq, HERTZ_FORMAT);
|
||||
MyTim->setCaptureCompare(timerChan, 50, PERCENT_COMPARE_FORMAT); // 50 %
|
||||
MyTim->resume();
|
||||
timerIsRunning = 1;
|
||||
}
|
||||
}
|
||||
if (timerStepPosition == timerStepPositionAtEnd) // Are we finished?
|
||||
{
|
||||
timerIsRunning = 0;
|
||||
MyTim->pause();
|
||||
}
|
||||
}
|
||||
|
||||
void StepGen::setScale(int16_t spm)
|
||||
{
|
||||
stepsPerMM = spm;
|
||||
}
|
||||
|
||||
uint32_t StepGen::sync0CycleTime = 0;
|
||||
@@ -1,184 +0,0 @@
|
||||
#include <Arduino.h>
|
||||
#include <stdio.h>
|
||||
extern "C"
|
||||
{
|
||||
#include "ecat_slv.h"
|
||||
#include "utypes.h"
|
||||
};
|
||||
_Objects Obj;
|
||||
|
||||
HardwareSerial Serial1(PA10, PA9);
|
||||
|
||||
#define DEBUG_TIM8 1
|
||||
#include "MyEncoder.h"
|
||||
void indexPulseEncoderCB1(void);
|
||||
MyEncoder Encoder1(TIM2, PA2, indexPulseEncoderCB1);
|
||||
void indexPulseEncoderCB1(void)
|
||||
{
|
||||
Encoder1.indexPulse();
|
||||
}
|
||||
|
||||
#include "StepGen.h"
|
||||
|
||||
void timerCallbackStep1(void);
|
||||
StepGen Step1(TIM1, 4, PA_11, PA12, timerCallbackStep1);
|
||||
void timerCallbackStep1(void)
|
||||
{
|
||||
Step1.timerCB();
|
||||
}
|
||||
|
||||
void timerCallbackStep2(void);
|
||||
StepGen Step2(TIM3, 4, PC_9, PC10, timerCallbackStep2);
|
||||
void timerCallbackStep2(void)
|
||||
{
|
||||
Step2.timerCB();
|
||||
}
|
||||
|
||||
CircularBuffer<uint32_t, 200> Tim;
|
||||
volatile uint64_t nowTime = 0, thenTime = 0;
|
||||
|
||||
void cb_set_outputs(void) // Master outputs gets here, slave inputs, first operation
|
||||
{
|
||||
Encoder1.setLatch(Obj.IndexLatchEnable);
|
||||
Encoder1.setScale(Obj.EncPosScale);
|
||||
|
||||
Step1.reqPos(Obj.StepGenIn1.CommandedPosition);
|
||||
Step1.setScale(Obj.StepGenIn1.StepsPerMM);
|
||||
Step1.enable(Obj.Enable1);
|
||||
Step2.reqPos(Obj.StepGenIn2.CommandedPosition);
|
||||
Step2.setScale(Obj.StepGenIn2.StepsPerMM);
|
||||
Step2.enable(Obj.Enable1);
|
||||
}
|
||||
|
||||
void handleStepper(void)
|
||||
{
|
||||
Step1.handleStepper();
|
||||
Step2.handleStepper();
|
||||
}
|
||||
|
||||
void cb_get_inputs(void) // Set Master inputs, slave outputs, last operation
|
||||
{
|
||||
Obj.IndexStatus = Encoder1.indexHappened();
|
||||
Obj.EncPos = Encoder1.currentPos();
|
||||
Obj.EncFrequency = Encoder1.frequency(ESCvar.Time);
|
||||
Obj.IndexByte = Encoder1.getIndexState();
|
||||
|
||||
Obj.StepGenOut1.ActualPosition = Step1.actPos();
|
||||
Obj.StepGenOut2.ActualPosition = Step2.actPos();
|
||||
|
||||
uint32_t dTim = nowTime - thenTime; // Debug. Getting jitter over the last 200 milliseconds
|
||||
Tim.push(dTim);
|
||||
uint32_t max_Tim = 0, min_Tim = UINT32_MAX;
|
||||
for (decltype(Tim)::index_t i = 0; i < Tim.size(); i++)
|
||||
{
|
||||
uint32_t aTim = Tim[i];
|
||||
if (aTim > max_Tim)
|
||||
max_Tim = aTim;
|
||||
if (aTim < min_Tim)
|
||||
min_Tim = aTim;
|
||||
}
|
||||
thenTime = nowTime;
|
||||
Obj.DiffT = max_Tim - min_Tim; // Debug
|
||||
}
|
||||
|
||||
void ESC_interrupt_enable(uint32_t mask);
|
||||
void ESC_interrupt_disable(uint32_t mask);
|
||||
uint16_t dc_checker(void);
|
||||
void sync0Handler(void);
|
||||
|
||||
static esc_cfg_t config =
|
||||
{
|
||||
.user_arg = NULL,
|
||||
.use_interrupt = 1,
|
||||
.watchdog_cnt = 150,
|
||||
.set_defaults_hook = NULL,
|
||||
.pre_state_change_hook = NULL,
|
||||
.post_state_change_hook = NULL,
|
||||
.application_hook = handleStepper,
|
||||
.safeoutput_override = NULL,
|
||||
.pre_object_download_hook = NULL,
|
||||
.post_object_download_hook = NULL,
|
||||
.rxpdo_override = NULL,
|
||||
.txpdo_override = NULL,
|
||||
.esc_hw_interrupt_enable = ESC_interrupt_enable,
|
||||
.esc_hw_interrupt_disable = ESC_interrupt_disable,
|
||||
.esc_hw_eep_handler = NULL,
|
||||
.esc_check_dc_handler = dc_checker,
|
||||
};
|
||||
|
||||
volatile byte serveIRQ = 0;
|
||||
|
||||
void setup(void)
|
||||
{
|
||||
Serial1.begin(115200);
|
||||
rcc_config(); // probably breaks some timers.
|
||||
ecat_slv_init(&config);
|
||||
}
|
||||
|
||||
void loop(void)
|
||||
{
|
||||
if (serveIRQ)
|
||||
{
|
||||
nowTime = micros();
|
||||
DIG_process(DIG_PROCESS_WD_FLAG | DIG_PROCESS_OUTPUTS_FLAG |
|
||||
DIG_PROCESS_APP_HOOK_FLAG | DIG_PROCESS_INPUTS_FLAG);
|
||||
serveIRQ = 0;
|
||||
ESCvar.PrevTime = ESCvar.Time;
|
||||
}
|
||||
uint32_t dTime = micros() - nowTime;
|
||||
if ((dTime > 200 && dTime < 500) || dTime > 1500) // Don't run ecat_slv_poll when expecting to serve interrupt
|
||||
ecat_slv_poll();
|
||||
}
|
||||
|
||||
void sync0Handler(void)
|
||||
{
|
||||
serveIRQ = 1;
|
||||
}
|
||||
|
||||
void ESC_interrupt_enable(uint32_t mask)
|
||||
{
|
||||
// Enable interrupt for SYNC0 or SM2 or SM3
|
||||
// uint32_t user_int_mask = ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM2 | ESCREG_ALEVENT_SM3;
|
||||
uint32_t user_int_mask = ESCREG_ALEVENT_SM2; // Only SM2
|
||||
if (mask & user_int_mask)
|
||||
{
|
||||
ESC_ALeventmaskwrite(ESC_ALeventmaskread() | (mask & user_int_mask));
|
||||
attachInterrupt(digitalPinToInterrupt(PC3), sync0Handler, RISING);
|
||||
|
||||
// Set LAN9252 interrupt pin driver as push-pull active high
|
||||
uint32_t bits = 0x00000111;
|
||||
ESC_write(0x54, &bits, 4);
|
||||
|
||||
// Enable LAN9252 interrupt
|
||||
bits = 0x00000001;
|
||||
ESC_write(0x5c, &bits, 4);
|
||||
}
|
||||
}
|
||||
|
||||
void ESC_interrupt_disable(uint32_t mask)
|
||||
{
|
||||
// Enable interrupt for SYNC0 or SM2 or SM3
|
||||
// uint32_t user_int_mask = ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM2 | ESCREG_ALEVENT_SM3;
|
||||
uint32_t user_int_mask = ESCREG_ALEVENT_SM2;
|
||||
|
||||
if (mask & user_int_mask)
|
||||
{
|
||||
// Disable interrupt from SYNC0
|
||||
ESC_ALeventmaskwrite(ESC_ALeventmaskread() & ~(mask & user_int_mask));
|
||||
detachInterrupt(digitalPinToInterrupt(PC3));
|
||||
// Disable LAN9252 interrupt
|
||||
uint32_t bits = 0x00000000;
|
||||
ESC_write(0x5c, &bits, 4);
|
||||
}
|
||||
}
|
||||
|
||||
extern "C" uint32_t ESC_SYNC0cycletime(void);
|
||||
|
||||
// Setup of DC
|
||||
uint16_t dc_checker(void)
|
||||
{
|
||||
// Indicate we run DC
|
||||
ESCvar.dcsync = 1;
|
||||
StepGen::sync0CycleTime = ESC_SYNC0cycletime() / 1000; // usecs
|
||||
return 0;
|
||||
}
|
||||
@@ -1,14 +0,0 @@
|
||||
AX58100-stm32-ethercat-backups
|
||||
.~lock*
|
||||
fp-info-cache
|
||||
\#auto_saved_file*
|
||||
gerbers/
|
||||
Ax58100-stm32-ethercat-backups/
|
||||
freerouting.*
|
||||
*.dsn
|
||||
*.frb
|
||||
*.rules
|
||||
*.ses
|
||||
|
||||
Ax58100-stm32-ethercat.csv
|
||||
Ax58100-stm32-ethercat.ods
|
||||
File diff suppressed because it is too large.
Load diff
@@ -1,103 +0,0 @@
|
||||
(kicad_sch (version 20230121) (generator eeschema)
|
||||
|
||||
(uuid 5597aedc-b607-407f-bbfd-31b3b298ecb1)
|
||||
|
||||
(paper "A4")
|
||||
|
||||
(title_block
|
||||
(title "MetalMusings EaserCAT 3000")
|
||||
)
|
||||
|
||||
(lib_symbols
|
||||
)
|
||||
|
||||
|
||||
(sheet (at 57.15 156.21) (size 93.98 39.37) (fields_autoplaced)
|
||||
(stroke (width 0.1524) (type solid))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid 0a376a6c-0f15-42f8-81f6-3a55619be267)
|
||||
(property "Sheetname" "Input-Output" (at 57.15 155.4984 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheetfile" "peripherals.kicad_sch" (at 57.15 196.1646 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(instances
|
||||
(project "Ax58100-stm32-ethercat"
|
||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "5"))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet (at 170.18 31.75) (size 101.6 58.42) (fields_autoplaced)
|
||||
(stroke (width 0.1524) (type solid))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid 5bf93325-f5d9-4344-9bf3-f5fc91bc1622)
|
||||
(property "Sheetname" "AX58100 phys etc" (at 170.18 31.0384 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheetfile" "AX58100_phy_etc.kicad_sch" (at 170.18 90.7546 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(instances
|
||||
(project "Ax58100-stm32-ethercat"
|
||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "3"))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet (at 57.15 31.75) (size 93.98 60.96) (fields_autoplaced)
|
||||
(stroke (width 0.1524) (type solid))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid 9f485422-734f-43d3-94ea-443cbc453d2e)
|
||||
(property "Sheetname" "AX58100" (at 57.15 31.0384 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheetfile" "AX48100.kicad_sch" (at 57.15 93.2946 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(instances
|
||||
(project "Ax58100-stm32-ethercat"
|
||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "2"))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet (at 171.45 156.21) (size 105.41 39.37) (fields_autoplaced)
|
||||
(stroke (width 0.1524) (type solid))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid cd91a270-7393-4003-91a3-e42304da540b)
|
||||
(property "Sheetname" "Stepper+encoder" (at 171.45 155.4984 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheetfile" "Steppers.kicad_sch" (at 171.45 196.1646 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(instances
|
||||
(project "Ax58100-stm32-ethercat"
|
||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "6"))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet (at 57.15 106.68) (size 93.98 35.56) (fields_autoplaced)
|
||||
(stroke (width 0.1524) (type solid))
|
||||
(fill (color 0 0 0 0.0000))
|
||||
(uuid d564400f-40ba-4aca-9c2a-14ec52a8353b)
|
||||
(property "Sheetname" "STM32F4" (at 57.15 105.9684 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left bottom))
|
||||
)
|
||||
(property "Sheetfile" "STM32F4.kicad_sch" (at 57.15 142.8246 0)
|
||||
(effects (font (size 1.27 1.27)) (justify left top))
|
||||
)
|
||||
(instances
|
||||
(project "Ax58100-stm32-ethercat"
|
||||
(path "/5597aedc-b607-407f-bbfd-31b3b298ecb1" (page "4"))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(sheet_instances
|
||||
(path "/" (page "1"))
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -9,9 +9,8 @@ Mcu.CPN=STM32F407VGT6
|
||||
Mcu.Family=STM32F4
|
||||
Mcu.IP0=DAC
|
||||
Mcu.IP1=I2C2
|
||||
Mcu.IP10=TIM5
|
||||
Mcu.IP11=TIM9
|
||||
Mcu.IP12=USART1
|
||||
Mcu.IP10=TIM8
|
||||
Mcu.IP11=USART1
|
||||
Mcu.IP2=NVIC
|
||||
Mcu.IP3=RCC
|
||||
Mcu.IP4=SPI1
|
||||
@@ -20,44 +19,48 @@ Mcu.IP6=TIM1
|
||||
Mcu.IP7=TIM2
|
||||
Mcu.IP8=TIM3
|
||||
Mcu.IP9=TIM4
|
||||
Mcu.IPNb=13
|
||||
Mcu.IPNb=12
|
||||
Mcu.Name=STM32F407V(E-G)Tx
|
||||
Mcu.Package=LQFP100
|
||||
Mcu.Pin0=PE5
|
||||
Mcu.Pin1=PA0-WKUP
|
||||
Mcu.Pin10=PB0
|
||||
Mcu.Pin11=PB1
|
||||
Mcu.Pin12=PE7
|
||||
Mcu.Pin13=PE8
|
||||
Mcu.Pin14=PE9
|
||||
Mcu.Pin15=PE10
|
||||
Mcu.Pin16=PE11
|
||||
Mcu.Pin17=PE12
|
||||
Mcu.Pin18=PE13
|
||||
Mcu.Pin19=PE14
|
||||
Mcu.Pin2=PA1
|
||||
Mcu.Pin20=PE15
|
||||
Mcu.Pin21=PB10
|
||||
Mcu.Pin22=PB11
|
||||
Mcu.Pin23=PD11
|
||||
Mcu.Pin24=PD12
|
||||
Mcu.Pin25=PC9
|
||||
Mcu.Pin26=PA8
|
||||
Mcu.Pin27=PA9
|
||||
Mcu.Pin28=PA10
|
||||
Mcu.Pin29=PA11
|
||||
Mcu.Pin3=PA2
|
||||
Mcu.Pin30=PA12
|
||||
Mcu.Pin31=PC10
|
||||
Mcu.Pin32=PB6
|
||||
Mcu.Pin33=VP_SYS_VS_Systick
|
||||
Mcu.Pin4=PA4
|
||||
Mcu.Pin5=PA5
|
||||
Mcu.Pin6=PA6
|
||||
Mcu.Pin7=PA7
|
||||
Mcu.Pin8=PC4
|
||||
Mcu.Pin9=PC5
|
||||
Mcu.PinsNb=34
|
||||
Mcu.Pin0=PA0-WKUP
|
||||
Mcu.Pin1=PA1
|
||||
Mcu.Pin10=PB1
|
||||
Mcu.Pin11=PE7
|
||||
Mcu.Pin12=PE8
|
||||
Mcu.Pin13=PE9
|
||||
Mcu.Pin14=PE10
|
||||
Mcu.Pin15=PE11
|
||||
Mcu.Pin16=PE12
|
||||
Mcu.Pin17=PE13
|
||||
Mcu.Pin18=PE14
|
||||
Mcu.Pin19=PE15
|
||||
Mcu.Pin2=PA2
|
||||
Mcu.Pin20=PB10
|
||||
Mcu.Pin21=PB11
|
||||
Mcu.Pin22=PD11
|
||||
Mcu.Pin23=PD12
|
||||
Mcu.Pin24=PD13
|
||||
Mcu.Pin25=PC6
|
||||
Mcu.Pin26=PC7
|
||||
Mcu.Pin27=PC9
|
||||
Mcu.Pin28=PA8
|
||||
Mcu.Pin29=PA9
|
||||
Mcu.Pin3=PA4
|
||||
Mcu.Pin30=PA10
|
||||
Mcu.Pin31=PA11
|
||||
Mcu.Pin32=PA12
|
||||
Mcu.Pin33=PC10
|
||||
Mcu.Pin34=PB4
|
||||
Mcu.Pin35=PB5
|
||||
Mcu.Pin36=PB6
|
||||
Mcu.Pin37=VP_SYS_VS_Systick
|
||||
Mcu.Pin4=PA5
|
||||
Mcu.Pin5=PA6
|
||||
Mcu.Pin6=PA7
|
||||
Mcu.Pin7=PC4
|
||||
Mcu.Pin8=PC5
|
||||
Mcu.Pin9=PB0
|
||||
Mcu.PinsNb=38
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F407VGTx
|
||||
@@ -81,7 +84,8 @@ PA10.Signal=USART1_RX
|
||||
PA11.Signal=S_TIM1_CH4
|
||||
PA12.Locked=true
|
||||
PA12.Signal=GPIO_Output
|
||||
PA2.Signal=S_TIM5_CH3
|
||||
PA2.Locked=true
|
||||
PA2.Signal=GPIO_Input
|
||||
PA4.Signal=COMP_DAC1_group
|
||||
PA5.Mode=Full_Duplex_Master
|
||||
PA5.Signal=SPI1_SCK
|
||||
@@ -101,6 +105,8 @@ PB10.Mode=I2C
|
||||
PB10.Signal=I2C2_SCL
|
||||
PB11.Mode=I2C
|
||||
PB11.Signal=I2C2_SDA
|
||||
PB4.Signal=S_TIM3_CH1
|
||||
PB5.Signal=S_TIM3_CH2
|
||||
PB6.Locked=true
|
||||
PB6.Signal=GPIO_Input
|
||||
PC10.Locked=true
|
||||
@@ -109,10 +115,13 @@ PC4.Locked=true
|
||||
PC4.Signal=GPIO_Output
|
||||
PC5.Locked=true
|
||||
PC5.Signal=GPIO_Input
|
||||
PC9.Signal=S_TIM3_CH4
|
||||
PC6.Signal=S_TIM8_CH1
|
||||
PC7.Signal=S_TIM8_CH2
|
||||
PC9.Signal=S_TIM8_CH4
|
||||
PD11.Locked=true
|
||||
PD11.Signal=GPIO_Input
|
||||
PD12.Signal=S_TIM4_CH1
|
||||
PD13.Signal=S_TIM4_CH2
|
||||
PE10.Locked=true
|
||||
PE10.Signal=GPIO_Output
|
||||
PE11.Locked=true
|
||||
@@ -125,7 +134,6 @@ PE14.Locked=true
|
||||
PE14.Signal=GPIO_Input
|
||||
PE15.Locked=true
|
||||
PE15.Signal=GPIO_Input
|
||||
PE5.Signal=S_TIM9_CH1
|
||||
PE7.Locked=true
|
||||
PE7.Signal=GPIO_Output
|
||||
PE8.Locked=true
|
||||
@@ -192,14 +200,20 @@ SH.S_TIM2_CH1_ETR.0=TIM2_CH1,Encoder_Interface
|
||||
SH.S_TIM2_CH1_ETR.ConfNb=1
|
||||
SH.S_TIM2_CH2.0=TIM2_CH2,Encoder_Interface
|
||||
SH.S_TIM2_CH2.ConfNb=1
|
||||
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM3_CH4.ConfNb=1
|
||||
SH.S_TIM4_CH1.0=TIM4_CH1,PWM Generation1 CH1
|
||||
SH.S_TIM3_CH1.0=TIM3_CH1,Encoder_Interface
|
||||
SH.S_TIM3_CH1.ConfNb=1
|
||||
SH.S_TIM3_CH2.0=TIM3_CH2,Encoder_Interface
|
||||
SH.S_TIM3_CH2.ConfNb=1
|
||||
SH.S_TIM4_CH1.0=TIM4_CH1,Encoder_Interface
|
||||
SH.S_TIM4_CH1.ConfNb=1
|
||||
SH.S_TIM5_CH3.0=TIM5_CH3,Input_Capture3_from_TI3
|
||||
SH.S_TIM5_CH3.ConfNb=1
|
||||
SH.S_TIM9_CH1.0=TIM9_CH1,PWM Generation1 CH1
|
||||
SH.S_TIM9_CH1.ConfNb=1
|
||||
SH.S_TIM4_CH2.0=TIM4_CH2,Encoder_Interface
|
||||
SH.S_TIM4_CH2.ConfNb=1
|
||||
SH.S_TIM8_CH1.0=TIM8_CH1,Encoder_Interface
|
||||
SH.S_TIM8_CH1.ConfNb=1
|
||||
SH.S_TIM8_CH2.0=TIM8_CH2,Encoder_Interface
|
||||
SH.S_TIM8_CH2.ConfNb=1
|
||||
SH.S_TIM8_CH4.0=TIM8_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM8_CH4.ConfNb=1
|
||||
SPI1.CalculateBaudRate=8.0 MBits/s
|
||||
SPI1.Direction=SPI_DIRECTION_2LINES
|
||||
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
|
||||
@@ -207,14 +221,8 @@ SPI1.Mode=SPI_MODE_MASTER
|
||||
SPI1.VirtualType=VM_MASTER
|
||||
TIM1.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM1.IPParameters=Channel-PWM Generation4 CH4
|
||||
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM3.IPParameters=Channel-PWM Generation4 CH4
|
||||
TIM4.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
||||
TIM4.IPParameters=Channel-PWM Generation1 CH1
|
||||
TIM5.Channel-Input_Capture3_from_TI3=TIM_CHANNEL_3
|
||||
TIM5.IPParameters=Channel-Input_Capture3_from_TI3
|
||||
TIM9.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
|
||||
TIM9.IPParameters=Channel-PWM Generation1 CH1
|
||||
TIM8.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM8.IPParameters=Channel-PWM Generation4 CH4
|
||||
USART1.IPParameters=VirtualMode
|
||||
USART1.VirtualMode=VM_ASYNC
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
@@ -1,6 +1,6 @@
|
||||
<head>
|
||||
<meta charset="UTF-8">
|
||||
<title>🔁 EEPROM Generator | ESI, EEPROM, SOES C code configuration tool</title>
|
||||
<title>🔁 EEPROM Generator | ESI, EEPORM, SOES C code configuration tool</title>
|
||||
<!--
|
||||
* SOES EEPROM generator
|
||||
* This tool serves as:
|
||||
@@ -52,12 +52,10 @@
|
||||
<option value="INTEGER8">INTEGER8</option>
|
||||
<option value="INTEGER16">INTEGER16</option>
|
||||
<option value="INTEGER32">INTEGER32</option>
|
||||
<option value="INTEGER64">INTEGER64</option>
|
||||
<option value="UNSIGNED8">UNSIGNED8</option>
|
||||
<option value="UNSIGNED16">UNSIGNED16</option>
|
||||
<option value="UNSIGNED32">UNSIGNED64</option>
|
||||
<option value="UNSIGNED32">UNSIGNED32</option>
|
||||
<option value="REAL32">REAL32</option>
|
||||
<option value="REAL64">REAL64</option>
|
||||
<option value="VISIBLE_STRING">VISIBLE STRING</option>
|
||||
</select></td>
|
||||
</tr>
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
+1
-10
@@ -28,13 +28,10 @@ const DTYPE = {
|
||||
INTEGER8 : 'INTEGER8',
|
||||
INTEGER16 : 'INTEGER16',
|
||||
INTEGER32 : 'INTEGER32',
|
||||
INTEGER32 : 'INTEGER64',
|
||||
UNSIGNED8 : 'UNSIGNED8',
|
||||
UNSIGNED16 : 'UNSIGNED16',
|
||||
UNSIGNED32 : 'UNSIGNED32',
|
||||
UNSIGNED32 : 'UNSIGNED64',
|
||||
REAL32 : 'REAL32',
|
||||
REAL64 : 'REAL64',
|
||||
VISIBLE_STRING : 'VISIBLE_STRING',
|
||||
/* TODO implement missing less common types */
|
||||
// OCTET_STRING : 'OCTET_STRING',
|
||||
@@ -52,13 +49,10 @@ const dtype_bitsize = {
|
||||
'INTEGER8' : 8,
|
||||
'INTEGER16' : 16,
|
||||
'INTEGER32' : 32,
|
||||
'INTEGER64' : 64,
|
||||
'UNSIGNED8' : 8,
|
||||
'UNSIGNED16' : 16,
|
||||
'UNSIGNED32' : 32,
|
||||
'UNSIGNED64' : 64,
|
||||
'REAL32' : 32,
|
||||
'REAL64' : 64,
|
||||
'VISIBLE_STRING' : 8,
|
||||
};
|
||||
const booleanPaddingBitsize = 7;
|
||||
@@ -68,13 +62,10 @@ const ESI_DT = {
|
||||
'INTEGER8': { name: 'SINT', bitsize: 8, ctype: 'int8_t' },
|
||||
'INTEGER16': { name: 'INT', bitsize: 16, ctype: 'int16_t' },
|
||||
'INTEGER32': { name: 'DINT', bitsize: 32, ctype: 'int32_t' },
|
||||
'INTEGER64': { name: 'LINT', bitsize: 64, ctype: 'int64_t' },
|
||||
'UNSIGNED8': { name: 'USINT', bitsize: 8, ctype: 'uint8_t' },
|
||||
'UNSIGNED16': { name: 'UINT', bitsize: 16, ctype: 'uint16_t' },
|
||||
'UNSIGNED32': { name: 'UDINT', bitsize: 32, ctype: 'uint32_t' },
|
||||
'UNSIGNED64': { name: 'ULINT', bitsize: 64, ctype: 'uint64_t' },
|
||||
'REAL32': { name: 'REAL', bitsize: 32, ctype: 'float' },
|
||||
'REAL64': { name: 'LREAL', bitsize: 64, ctype: 'double' },
|
||||
'REAL32': { name: 'REAL', bitsize: 32, ctype: 'float' }, // TODO check C type name
|
||||
'VISIBLE_STRING': { name: 'STRING', bitsize: 8, ctype: 'char *' }, // TODO check C type name
|
||||
};
|
||||
|
||||
File renamed without changes.
File renamed without changes.
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File renamed without changes.
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File renamed without changes.
File renamed without changes.
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+2
-6
@@ -8,10 +8,6 @@
|
||||
"string": "cpp",
|
||||
"unordered_map": "cpp",
|
||||
"vector": "cpp",
|
||||
"system_error": "cpp",
|
||||
"numeric": "cpp",
|
||||
"ostream": "cpp"
|
||||
},
|
||||
"C_Cpp.errorSquiggles": "disabled",
|
||||
"cmake.configureOnOpen": false
|
||||
"system_error": "cpp"
|
||||
}
|
||||
}
|
||||
File renamed without changes.
Executable
+38
@@ -0,0 +1,38 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
|
||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void StepperSetup(void);
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
|
||||
void makePulses(uint32_t totalLength /* µsec */, uint32_t nPulses);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
+717
@@ -0,0 +1,717 @@
|
||||
|
||||
#ifndef __Stm32F4_Encoder_H__
|
||||
#define __Stm32F4_Encoder_H__
|
||||
#include <Arduino.h>
|
||||
|
||||
|
||||
#define GPIO_Speed_50MHz 0x02 /*!< Fast speed */
|
||||
|
||||
//#define GPIO_MODER_MODER0 ((uint32_t)0x00000003)
|
||||
#define GPIO_Mode_OUT 0x01
|
||||
//#define GPIO_OSPEEDER_OSPEEDR0 ((uint32_t)0x00000003)
|
||||
//#define GPIO_OTYPER_OT_0 ((uint32_t)0x00000001)
|
||||
//#define GPIO_PUPDR_PUPDR0 ((uint32_t)0x00000003)
|
||||
|
||||
#define GPIO_PuPd_NOPULL 0x00
|
||||
#define GPIO_Mode_AF 0x02
|
||||
#define GPIO_OType_PP 0x00
|
||||
#define GPIO_PuPd_NOPULL 0x00
|
||||
#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
|
||||
#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
|
||||
#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
|
||||
#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
|
||||
#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
|
||||
#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
|
||||
#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
|
||||
#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
|
||||
#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */
|
||||
#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */
|
||||
#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */
|
||||
#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */
|
||||
#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */
|
||||
#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */
|
||||
#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */
|
||||
#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */
|
||||
#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct TIM_TimeBaseInitTypeDef
|
||||
{
|
||||
uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
|
||||
This parameter can be a number between 0x0000 and 0xFFFF */
|
||||
|
||||
uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
|
||||
This parameter can be a value of @ref TIM_Counter_Mode */
|
||||
|
||||
uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active
|
||||
Auto-Reload Register at the next update event.
|
||||
This parameter must be a number between 0x0000 and 0xFFFF. */
|
||||
|
||||
uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
|
||||
This parameter can be a value of @ref TIM_Clock_Division_CKD */
|
||||
|
||||
uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
|
||||
reaches zero, an update event is generated and counting restarts
|
||||
from the RCR value (N).
|
||||
This means in PWM mode that (N+1) corresponds to:
|
||||
- the number of PWM periods in edge-aligned mode
|
||||
- the number of half PWM period in center-aligned mode
|
||||
This parameter must be a number between 0x00 and 0xFF.
|
||||
@note This parameter is valid only for TIM1 and TIM8. */
|
||||
} TIM_TimeBaseInitTypeDef;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t setcount;
|
||||
|
||||
} encoder;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
|
||||
|
||||
uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_State */
|
||||
|
||||
uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_N_State
|
||||
@note This parameter is valid only for TIM1 and TIM8. */
|
||||
|
||||
uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
|
||||
This parameter can be a number between 0x0000 and 0xFFFF */
|
||||
|
||||
uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_Polarity */
|
||||
|
||||
uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
|
||||
@note This parameter is valid only for TIM1 and TIM8. */
|
||||
|
||||
uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_Idle_State
|
||||
@note This parameter is valid only for TIM1 and TIM8. */
|
||||
|
||||
uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
|
||||
This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
|
||||
@note This parameter is valid only for TIM1 and TIM8. */
|
||||
} TIM_OCInitTypeDef;
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t TIM_Channel; /*!< Specifies the TIM channel.
|
||||
This parameter can be a value of @ref TIM_Channel */
|
||||
|
||||
uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
|
||||
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
|
||||
|
||||
uint16_t TIM_ICSelection; /*!< Specifies the input.
|
||||
This parameter can be a value of @ref TIM_Input_Capture_Selection */
|
||||
|
||||
uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
|
||||
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
|
||||
|
||||
uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
|
||||
This parameter can be a number between 0x0 and 0xF */
|
||||
} TIM_ICInitTypeDef;
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
|
||||
This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
|
||||
|
||||
uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
|
||||
This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
|
||||
|
||||
uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
|
||||
This parameter can be a value of @ref TIM_Lock_level */
|
||||
|
||||
uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
|
||||
switching-on of the outputs.
|
||||
This parameter can be a number between 0x00 and 0xFF */
|
||||
|
||||
uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
|
||||
This parameter can be a value of @ref TIM_Break_Input_enable_disable */
|
||||
|
||||
uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
|
||||
This parameter can be a value of @ref TIM_Break_Polarity */
|
||||
|
||||
uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
|
||||
This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
|
||||
} TIM_BDTRInitTypeDef;
|
||||
|
||||
|
||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||
#define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
|
||||
#define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
|
||||
|
||||
#define TIM4 ((TIM_TypeDef *) TIM4_BASE)
|
||||
#define TIM8 ((TIM_TypeDef *) TIM8_BASE)
|
||||
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
||||
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
||||
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
||||
//#define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
|
||||
//#define TIM_CR1_CEN ((uint16_t)0x0001) /*!<Counter enable */
|
||||
|
||||
#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||
((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM6) || \
|
||||
((PERIPH) == TIM7) || \
|
||||
((PERIPH) == TIM8) || \
|
||||
((PERIPH) == TIM9) || \
|
||||
((PERIPH) == TIM10) || \
|
||||
((PERIPH) == TIM11) || \
|
||||
((PERIPH) == TIM12) || \
|
||||
(((PERIPH) == TIM13) || \
|
||||
((PERIPH) == TIM14)))
|
||||
|
||||
#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||
((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM8) || \
|
||||
((PERIPH) == TIM9) || \
|
||||
((PERIPH) == TIM10) || \
|
||||
((PERIPH) == TIM11) || \
|
||||
((PERIPH) == TIM12) || \
|
||||
((PERIPH) == TIM13) || \
|
||||
((PERIPH) == TIM14))
|
||||
|
||||
|
||||
#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||
((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM8) || \
|
||||
((PERIPH) == TIM9) || \
|
||||
((PERIPH) == TIM12))
|
||||
|
||||
#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||
((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM8))
|
||||
|
||||
#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||
((PERIPH) == TIM8))
|
||||
|
||||
#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
|
||||
((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM6) || \
|
||||
((PERIPH) == TIM7) || \
|
||||
((PERIPH) == TIM8))
|
||||
|
||||
#define IS_TIM_LIST6_PERIPH(TIMx)(((TIMx) == TIM2) || \
|
||||
((TIMx) == TIM5) || \
|
||||
((TIMx) == TIM11))
|
||||
|
||||
|
||||
|
||||
#define TIM_OCMode_Timing ((uint16_t)0x0000)
|
||||
#define TIM_OCMode_Active ((uint16_t)0x0010)
|
||||
#define TIM_OCMode_Inactive ((uint16_t)0x0020)
|
||||
#define TIM_OCMode_Toggle ((uint16_t)0x0030)
|
||||
#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
|
||||
#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
|
||||
//#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||
// ((MODE) == TIM_OCMode_Active) || \
|
||||
// ((MODE) == TIM_OCMode_Inactive) || \
|
||||
// ((MODE) == TIM_OCMode_Toggle)|| \
|
||||
// ((MODE) == TIM_OCMode_PWM1) || \
|
||||
// ((MODE) == TIM_OCMode_PWM2))
|
||||
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
|
||||
((MODE) == TIM_OCMode_Active) || \
|
||||
((MODE) == TIM_OCMode_Inactive) || \
|
||||
((MODE) == TIM_OCMode_Toggle)|| \
|
||||
((MODE) == TIM_OCMode_PWM1) || \
|
||||
((MODE) == TIM_OCMode_PWM2) || \
|
||||
((MODE) == TIM_ForcedAction_Active) || \
|
||||
((MODE) == TIM_ForcedAction_InActive))
|
||||
|
||||
|
||||
#define TIM_OPMode_Single ((uint16_t)0x0008)
|
||||
#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
|
||||
// ((MODE) == TIM_OPMode_Repetitive))
|
||||
|
||||
|
||||
#define TIM_Channel_1 ((uint16_t)0x0000)
|
||||
#define TIM_Channel_2 ((uint16_t)0x0004)
|
||||
#define TIM_Channel_3 ((uint16_t)0x0008)
|
||||
#define TIM_Channel_4 ((uint16_t)0x000C)
|
||||
|
||||
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2) || \
|
||||
((CHANNEL) == TIM_Channel_3) || \
|
||||
((CHANNEL) == TIM_Channel_4))
|
||||
|
||||
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2))
|
||||
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
|
||||
((CHANNEL) == TIM_Channel_2) || \
|
||||
((CHANNEL) == TIM_Channel_3))
|
||||
|
||||
|
||||
#define TIM_CKD_DIV1 ((uint16_t)0x0000)
|
||||
#define TIM_CKD_DIV2 ((uint16_t)0x0100)
|
||||
#define TIM_CKD_DIV4 ((uint16_t)0x0200)
|
||||
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
|
||||
((DIV) == TIM_CKD_DIV2) || \
|
||||
((DIV) == TIM_CKD_DIV4))
|
||||
|
||||
|
||||
#define TIM_CounterMode_Up ((uint16_t)0x0000)
|
||||
#define TIM_CounterMode_Down ((uint16_t)0x0010)
|
||||
#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
|
||||
#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
|
||||
#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
|
||||
//#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
|
||||
// ((MODE) == TIM_CounterMode_Down) || \
|
||||
// ((MODE) == TIM_CounterMode_CenterAligned1) || \
|
||||
// ((MODE) == TIM_CounterMode_CenterAligned2) || \
|
||||
// ((MODE) == TIM_CounterMode_CenterAligned3))
|
||||
|
||||
|
||||
#define TIM_OCPolarity_High ((uint16_t)0x0000)
|
||||
#define TIM_OCPolarity_Low ((uint16_t)0x0002)
|
||||
//#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
|
||||
// ((POLARITY) == TIM_OCPolarity_Low))
|
||||
|
||||
|
||||
#define TIM_OCNPolarity_High ((uint16_t)0x0000)
|
||||
#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
|
||||
//#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
|
||||
// ((POLARITY) == TIM_OCNPolarity_Low))
|
||||
|
||||
#define TIM_OutputState_Disable ((uint16_t)0x0000)
|
||||
#define TIM_OutputState_Enable ((uint16_t)0x0001)
|
||||
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
|
||||
((STATE) == TIM_OutputState_Enable))
|
||||
|
||||
|
||||
#define TIM_OutputNState_Disable ((uint16_t)0x0000)
|
||||
#define TIM_OutputNState_Enable ((uint16_t)0x0004)
|
||||
#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
|
||||
((STATE) == TIM_OutputNState_Enable))
|
||||
|
||||
|
||||
#define TIM_CCx_Enable ((uint16_t)0x0001)
|
||||
#define TIM_CCx_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
|
||||
((CCX) == TIM_CCx_Disable))
|
||||
|
||||
|
||||
#define TIM_CCxN_Enable ((uint16_t)0x0004)
|
||||
#define TIM_CCxN_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
|
||||
((CCXN) == TIM_CCxN_Disable))
|
||||
|
||||
|
||||
#define TIM_Break_Enable ((uint16_t)0x1000)
|
||||
#define TIM_Break_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
|
||||
// ((STATE) == TIM_Break_Disable))
|
||||
|
||||
|
||||
#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
|
||||
#define TIM_BreakPolarity_High ((uint16_t)0x2000)
|
||||
//#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
|
||||
// ((POLARITY) == TIM_BreakPolarity_High))
|
||||
|
||||
|
||||
#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
|
||||
#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
|
||||
// ((STATE) == TIM_AutomaticOutput_Disable))
|
||||
|
||||
|
||||
#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
|
||||
#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
|
||||
#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
|
||||
#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
|
||||
//#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
|
||||
// ((LEVEL) == TIM_LOCKLevel_1) || \
|
||||
// ((LEVEL) == TIM_LOCKLevel_2) || \
|
||||
// ((LEVEL) == TIM_LOCKLevel_3))
|
||||
|
||||
|
||||
#define TIM_OSSIState_Enable ((uint16_t)0x0400)
|
||||
#define TIM_OSSIState_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
|
||||
// ((STATE) == TIM_OSSIState_Disable))
|
||||
|
||||
|
||||
#define TIM_OSSRState_Enable ((uint16_t)0x0800)
|
||||
#define TIM_OSSRState_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
|
||||
// ((STATE) == TIM_OSSRState_Disable))
|
||||
|
||||
|
||||
#define TIM_OCIdleState_Set ((uint16_t)0x0100)
|
||||
#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
|
||||
// ((STATE) == TIM_OCIdleState_Reset))
|
||||
//
|
||||
|
||||
#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
|
||||
#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
|
||||
//#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
|
||||
// ((STATE) == TIM_OCNIdleState_Reset))
|
||||
|
||||
|
||||
#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
|
||||
#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
|
||||
#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A)
|
||||
//#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
|
||||
// ((POLARITY) == TIM_ICPolarity_Falling)|| \
|
||||
// ((POLARITY) == TIM_ICPolarity_BothEdge))
|
||||
|
||||
|
||||
#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
||||
connected to IC1, IC2, IC3 or IC4, respectively */
|
||||
#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
|
||||
connected to IC2, IC1, IC4 or IC3, respectively. */
|
||||
#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
|
||||
//#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
|
||||
// ((SELECTION) == TIM_ICSelection_IndirectTI) || \
|
||||
// ((SELECTION) == TIM_ICSelection_TRC))
|
||||
|
||||
|
||||
//#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
|
||||
//#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
|
||||
//#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
|
||||
//#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
|
||||
//#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
|
||||
// ((PRESCALER) == TIM_ICPSC_DIV2) || \
|
||||
// ((PRESCALER) == TIM_ICPSC_DIV4) || \
|
||||
// ((PRESCALER) == TIM_ICPSC_DIV8))
|
||||
|
||||
|
||||
#define TIM_IT_Update ((uint16_t)0x0001)
|
||||
//#define TIM_IT_CC1 ((uint16_t)0x0002)
|
||||
//#define TIM_IT_CC2 ((uint16_t)0x0004)
|
||||
//#define TIM_IT_CC3 ((uint16_t)0x0008)
|
||||
//#define TIM_IT_CC4 ((uint16_t)0x0010)
|
||||
//#define TIM_IT_COM ((uint16_t)0x0020)
|
||||
#define TIM_IT_Trigger ((uint16_t)0x0040)
|
||||
#define TIM_IT_Break ((uint16_t)0x0080)
|
||||
#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
|
||||
|
||||
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
|
||||
((IT) == TIM_IT_CC1) || \
|
||||
((IT) == TIM_IT_CC2) || \
|
||||
((IT) == TIM_IT_CC3) || \
|
||||
((IT) == TIM_IT_CC4) || \
|
||||
((IT) == TIM_IT_COM) || \
|
||||
((IT) == TIM_IT_Trigger) || \
|
||||
((IT) == TIM_IT_Break))
|
||||
|
||||
|
||||
//#define TIM_DMABase_CR1 ((uint16_t)0x0000)
|
||||
//#define TIM_DMABase_CR2 ((uint16_t)0x0001)
|
||||
//#define TIM_DMABase_SMCR ((uint16_t)0x0002)
|
||||
//#define TIM_DMABase_DIER ((uint16_t)0x0003)
|
||||
//#define TIM_DMABase_SR ((uint16_t)0x0004)
|
||||
//#define TIM_DMABase_EGR ((uint16_t)0x0005)
|
||||
//#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
|
||||
//#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
|
||||
//#define TIM_DMABase_CCER ((uint16_t)0x0008)
|
||||
//#define TIM_DMABase_CNT ((uint16_t)0x0009)
|
||||
//#define TIM_DMABase_PSC ((uint16_t)0x000A)
|
||||
//#define TIM_DMABase_ARR ((uint16_t)0x000B)
|
||||
//#define TIM_DMABase_RCR ((uint16_t)0x000C)
|
||||
//#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
|
||||
//#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
|
||||
//#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
|
||||
//#define TIM_DMABase_CCR4 ((uint16_t)0x0010)
|
||||
//#define TIM_DMABase_BDTR ((uint16_t)0x0011)
|
||||
//#define TIM_DMABase_DCR ((uint16_t)0x0012)
|
||||
//#define TIM_DMABase_OR ((uint16_t)0x0013)
|
||||
//#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
|
||||
// ((BASE) == TIM_DMABase_CR2) || \
|
||||
// ((BASE) == TIM_DMABase_SMCR) || \
|
||||
// ((BASE) == TIM_DMABase_DIER) || \
|
||||
// ((BASE) == TIM_DMABase_SR) || \
|
||||
// ((BASE) == TIM_DMABase_EGR) || \
|
||||
// ((BASE) == TIM_DMABase_CCMR1) || \
|
||||
// ((BASE) == TIM_DMABase_CCMR2) || \
|
||||
// ((BASE) == TIM_DMABase_CCER) || \
|
||||
// ((BASE) == TIM_DMABase_CNT) || \
|
||||
// ((BASE) == TIM_DMABase_PSC) || \
|
||||
// ((BASE) == TIM_DMABase_ARR) || \
|
||||
// ((BASE) == TIM_DMABase_RCR) || \
|
||||
// ((BASE) == TIM_DMABase_CCR1) || \
|
||||
// ((BASE) == TIM_DMABase_CCR2) || \
|
||||
// ((BASE) == TIM_DMABase_CCR3) || \
|
||||
// ((BASE) == TIM_DMABase_CCR4) || \
|
||||
// ((BASE) == TIM_DMABase_BDTR) || \
|
||||
// ((BASE) == TIM_DMABase_DCR) || \
|
||||
// ((BASE) == TIM_DMABase_OR))
|
||||
|
||||
|
||||
//#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000)
|
||||
//#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100)
|
||||
//#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200)
|
||||
//#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300)
|
||||
//#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400)
|
||||
//#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500)
|
||||
//#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600)
|
||||
//#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700)
|
||||
//#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800)
|
||||
//#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900)
|
||||
//#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00)
|
||||
//#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00)
|
||||
//#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00)
|
||||
//#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00)
|
||||
//#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00)
|
||||
//#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00)
|
||||
//#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000)
|
||||
//#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100)
|
||||
//#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_2Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_3Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_4Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_5Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_6Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_7Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_8Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_9Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_10Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_11Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_12Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_13Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_14Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_15Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_16Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_17Transfers) || \
|
||||
// ((LENGTH) == TIM_DMABurstLength_18Transfers))
|
||||
|
||||
|
||||
//#define TIM_DMA_Update ((uint16_t)0x0100)
|
||||
//#define TIM_DMA_CC1 ((uint16_t)0x0200)
|
||||
//#define TIM_DMA_CC2 ((uint16_t)0x0400)
|
||||
//#define TIM_DMA_CC3 ((uint16_t)0x0800)
|
||||
//#define TIM_DMA_CC4 ((uint16_t)0x1000)
|
||||
//#define TIM_DMA_COM ((uint16_t)0x2000)
|
||||
//#define TIM_DMA_Trigger ((uint16_t)0x4000)
|
||||
//#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
|
||||
|
||||
|
||||
|
||||
#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
|
||||
#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
|
||||
#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
|
||||
#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
|
||||
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
|
||||
((PRESCALER) == TIM_ExtTRGPSC_DIV8))
|
||||
|
||||
|
||||
//#define TIM_TS_ITR0 ((uint16_t)0x0000)
|
||||
//#define TIM_TS_ITR1 ((uint16_t)0x0010)
|
||||
//#define TIM_TS_ITR2 ((uint16_t)0x0020)
|
||||
//#define TIM_TS_ITR3 ((uint16_t)0x0030)
|
||||
//#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
|
||||
//#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
|
||||
//#define TIM_TS_TI2FP2 ((uint16_t)0x0060)
|
||||
//#define TIM_TS_ETRF ((uint16_t)0x0070)
|
||||
//#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||
// ((SELECTION) == TIM_TS_ITR1) || \
|
||||
// ((SELECTION) == TIM_TS_ITR2) || \
|
||||
// ((SELECTION) == TIM_TS_ITR3) || \
|
||||
// ((SELECTION) == TIM_TS_TI1F_ED) || \
|
||||
// ((SELECTION) == TIM_TS_TI1FP1) || \
|
||||
// ((SELECTION) == TIM_TS_TI2FP2) || \
|
||||
// ((SELECTION) == TIM_TS_ETRF))
|
||||
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
|
||||
((SELECTION) == TIM_TS_ITR1) || \
|
||||
((SELECTION) == TIM_TS_ITR2) || \
|
||||
((SELECTION) == TIM_TS_ITR3))
|
||||
|
||||
|
||||
#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
|
||||
#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
|
||||
#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
|
||||
|
||||
|
||||
#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
|
||||
#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
|
||||
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
|
||||
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
|
||||
|
||||
|
||||
#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
|
||||
#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
|
||||
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
|
||||
((RELOAD) == TIM_PSCReloadMode_Immediate))
|
||||
|
||||
#define TIM_ForcedAction_Active ((uint16_t)0x0050)
|
||||
#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
|
||||
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
|
||||
((ACTION) == TIM_ForcedAction_InActive))
|
||||
|
||||
|
||||
#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
|
||||
#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
|
||||
#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
|
||||
//#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
|
||||
// ((MODE) == TIM_EncoderMode_TI2) || \
|
||||
// ((MODE) == TIM_EncoderMode_TI12))
|
||||
|
||||
|
||||
//#define TIM_EventSource_Update ((uint16_t)0x0001)
|
||||
//#define TIM_EventSource_CC1 ((uint16_t)0x0002)
|
||||
//#define TIM_EventSource_CC2 ((uint16_t)0x0004)
|
||||
//#define TIM_EventSource_CC3 ((uint16_t)0x0008)
|
||||
//#define TIM_EventSource_CC4 ((uint16_t)0x0010)
|
||||
//#define TIM_EventSource_COM ((uint16_t)0x0020)
|
||||
//#define TIM_EventSource_Trigger ((uint16_t)0x0040)
|
||||
//#define TIM_EventSource_Break ((uint16_t)0x0080)
|
||||
//#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
|
||||
|
||||
|
||||
|
||||
#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
|
||||
or the setting of UG bit, or an update generation
|
||||
through the slave mode controller. */
|
||||
#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
|
||||
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
|
||||
((SOURCE) == TIM_UpdateSource_Regular))
|
||||
|
||||
|
||||
#define TIM_OCPreload_Enable ((uint16_t)0x0008)
|
||||
#define TIM_OCPreload_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
|
||||
((STATE) == TIM_OCPreload_Disable))
|
||||
|
||||
|
||||
#define TIM_OCFast_Enable ((uint16_t)0x0004)
|
||||
#define TIM_OCFast_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
|
||||
((STATE) == TIM_OCFast_Disable))
|
||||
|
||||
|
||||
#define TIM_OCClear_Enable ((uint16_t)0x0080)
|
||||
#define TIM_OCClear_Disable ((uint16_t)0x0000)
|
||||
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
|
||||
((STATE) == TIM_OCClear_Disable))
|
||||
|
||||
#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
|
||||
#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
|
||||
#define TIM_TRGOSource_Update ((uint16_t)0x0020)
|
||||
#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
|
||||
#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
|
||||
#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
|
||||
#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
|
||||
#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
|
||||
//#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_Enable) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_Update) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC1) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
|
||||
// ((SOURCE) == TIM_TRGOSource_OC4Ref))
|
||||
|
||||
|
||||
|
||||
|
||||
#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
|
||||
#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
|
||||
#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
|
||||
#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
|
||||
//#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
|
||||
// ((MODE) == TIM_SlaveMode_Gated) || \
|
||||
// ((MODE) == TIM_SlaveMode_Trigger) || \
|
||||
// ((MODE) == TIM_SlaveMode_External1))
|
||||
|
||||
#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
|
||||
#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
|
||||
//#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
|
||||
// ((STATE) == TIM_MasterSlaveMode_Disable))
|
||||
|
||||
#define TIM2_TIM8_TRGO ((uint16_t)0x0000)
|
||||
#define TIM2_ETH_PTP ((uint16_t)0x0400)
|
||||
#define TIM2_USBFS_SOF ((uint16_t)0x0800)
|
||||
#define TIM2_USBHS_SOF ((uint16_t)0x0C00)
|
||||
|
||||
#define TIM5_GPIO ((uint16_t)0x0000)
|
||||
#define TIM5_LSI ((uint16_t)0x0040)
|
||||
#define TIM5_LSE ((uint16_t)0x0080)
|
||||
#define TIM5_RTC ((uint16_t)0x00C0)
|
||||
|
||||
#define TIM11_GPIO ((uint16_t)0x0000)
|
||||
#define TIM11_HSE ((uint16_t)0x0002)
|
||||
|
||||
|
||||
enum EncTimer {
|
||||
Tim2,
|
||||
Tim3,
|
||||
Tim4,
|
||||
Tim8
|
||||
};
|
||||
|
||||
class Encoder
|
||||
{
|
||||
private:
|
||||
int _pin;
|
||||
|
||||
public:
|
||||
void eattach(int enco);
|
||||
Encoder();
|
||||
void SetCount( enum EncTimer enc, int64_t Counter);
|
||||
uint16_t GetCount( enum EncTimer enc);
|
||||
void attachh(int encoNumber);
|
||||
uint16_t c;
|
||||
};
|
||||
|
||||
void rcc_config();
|
||||
void GpioConfigPortA(GPIO_TypeDef * GPIOx) ;
|
||||
void GpioConfigPortC(GPIO_TypeDef * GPIOx) ;
|
||||
void GpioConfigPortD(GPIO_TypeDef * GPIOx) ;
|
||||
void TIM_EncoderInterConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
|
||||
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
||||
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
|
||||
#endif
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
+68
-706
File diff suppressed because it is too large.
Load diff
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
@@ -33,8 +33,8 @@
|
||||
#define SM3_smc 0x20
|
||||
#define SM3_act 1
|
||||
|
||||
#define MAX_MAPPINGS_SM2 8
|
||||
#define MAX_MAPPINGS_SM3 7
|
||||
#define MAX_MAPPINGS_SM2 2
|
||||
#define MAX_MAPPINGS_SM3 5
|
||||
|
||||
#define MAX_RXPDO_SIZE 512
|
||||
#define MAX_TXPDO_SIZE 512
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
@@ -57,7 +57,7 @@
|
||||
"pdo_mappings": [
|
||||
"txpdo"
|
||||
],
|
||||
"dtype": "REAL64",
|
||||
"dtype": "REAL32",
|
||||
"value": "0",
|
||||
"data": "&Obj.EncPos"
|
||||
},
|
||||
@@ -68,7 +68,7 @@
|
||||
"pdo_mappings": [
|
||||
"txpdo"
|
||||
],
|
||||
"dtype": "REAL64",
|
||||
"dtype": "REAL32",
|
||||
"value": "0",
|
||||
"data": "&Obj.EncFrequency"
|
||||
},
|
||||
@@ -104,46 +104,6 @@
|
||||
"dtype": "UNSIGNED32",
|
||||
"value": "0",
|
||||
"data": "&Obj.IndexStatus"
|
||||
},
|
||||
"6005": {
|
||||
"otype": "RECORD",
|
||||
"name": "StepGenOut1",
|
||||
"access": "RO",
|
||||
"items": [
|
||||
{
|
||||
"name": "Max SubIndex"
|
||||
},
|
||||
{
|
||||
"name": "ActualPosition",
|
||||
"dtype": "REAL64",
|
||||
"data": "&Obj.StepGenOut1.ActualPosition",
|
||||
"value": "0",
|
||||
"access": "RO"
|
||||
}
|
||||
],
|
||||
"pdo_mappings": [
|
||||
"txpdo"
|
||||
]
|
||||
},
|
||||
"6006": {
|
||||
"otype": "RECORD",
|
||||
"name": "StepGenOut2",
|
||||
"access": "RO",
|
||||
"items": [
|
||||
{
|
||||
"name": "Max SubIndex"
|
||||
},
|
||||
{
|
||||
"name": "ActualPosition",
|
||||
"dtype": "REAL64",
|
||||
"data": "&Obj.StepGenOut2.ActualPosition",
|
||||
"value": "0",
|
||||
"access": "RO"
|
||||
}
|
||||
],
|
||||
"pdo_mappings": [
|
||||
"txpdo"
|
||||
]
|
||||
}
|
||||
},
|
||||
"rxpdo": {
|
||||
@@ -169,71 +129,6 @@
|
||||
"value": "0",
|
||||
"data": "&Obj.IndexLatchEnable"
|
||||
},
|
||||
"7002": {
|
||||
"otype": "RECORD",
|
||||
"name": "StepGenIn1",
|
||||
"access": "RO",
|
||||
"items": [
|
||||
{
|
||||
"name": "Max SubIndex"
|
||||
},
|
||||
{
|
||||
"name": "CommandedPosition",
|
||||
"dtype": "REAL64",
|
||||
"data": "&Obj.StepGenIn1.CommandedPosition",
|
||||
"value": "0",
|
||||
"access": "RO"
|
||||
},
|
||||
{
|
||||
"name": "StepsPerMM",
|
||||
"dtype": "INTEGER16",
|
||||
"value": "0",
|
||||
"access": "RO",
|
||||
"data": "&Obj.StepGenIn1.StepsPerMM"
|
||||
}
|
||||
],
|
||||
"pdo_mappings": [
|
||||
"rxpdo"
|
||||
]
|
||||
},
|
||||
"7003": {
|
||||
"otype": "RECORD",
|
||||
"name": "StepGenIn2",
|
||||
"access": "RO",
|
||||
"items": [
|
||||
{
|
||||
"name": "Max SubIndex"
|
||||
},
|
||||
{
|
||||
"name": "CommandedPosition",
|
||||
"dtype": "REAL64",
|
||||
"data": "&Obj.StepGenIn2.CommandedPosition",
|
||||
"value": "0",
|
||||
"access": "RO"
|
||||
},
|
||||
{
|
||||
"name": "StepsPerMM",
|
||||
"dtype": "INTEGER16",
|
||||
"value": "0",
|
||||
"access": "RO",
|
||||
"data": "&Obj.StepGenIn2.StepsPerMM"
|
||||
}
|
||||
],
|
||||
"pdo_mappings": [
|
||||
"rxpdo"
|
||||
]
|
||||
},
|
||||
"7004": {
|
||||
"otype": "VAR",
|
||||
"name": "Enable1",
|
||||
"access": "RO",
|
||||
"pdo_mappings": [
|
||||
"rxpdo"
|
||||
],
|
||||
"dtype": "BOOLEAN",
|
||||
"value": "0",
|
||||
"data": "&Obj.Enable1"
|
||||
},
|
||||
"60664": {
|
||||
"otype": "VAR",
|
||||
"name": "ActualPosition",
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
@@ -19,18 +19,6 @@ static const char acName1600_01[] = "EncPosScale";
|
||||
static const char acName1601[] = "IndexLatchEnable";
|
||||
static const char acName1601_00[] = "Max SubIndex";
|
||||
static const char acName1601_01[] = "IndexLatchEnable";
|
||||
static const char acName1602[] = "StepGenIn1";
|
||||
static const char acName1602_00[] = "Max SubIndex";
|
||||
static const char acName1602_01[] = "CommandedPosition";
|
||||
static const char acName1602_02[] = "StepsPerMM";
|
||||
static const char acName1603[] = "StepGenIn2";
|
||||
static const char acName1603_00[] = "Max SubIndex";
|
||||
static const char acName1603_01[] = "CommandedPosition";
|
||||
static const char acName1603_02[] = "StepsPerMM";
|
||||
static const char acName1604[] = "Enable1";
|
||||
static const char acName1604_00[] = "Max SubIndex";
|
||||
static const char acName1604_01[] = "Enable1";
|
||||
static const char acName1604_02[] = "Padding 1";
|
||||
static const char acName1A00[] = "EncPos";
|
||||
static const char acName1A00_00[] = "Max SubIndex";
|
||||
static const char acName1A00_01[] = "EncPos";
|
||||
@@ -46,12 +34,6 @@ static const char acName1A03_01[] = "IndexByte";
|
||||
static const char acName1A04[] = "IndexStatus";
|
||||
static const char acName1A04_00[] = "Max SubIndex";
|
||||
static const char acName1A04_01[] = "IndexStatus";
|
||||
static const char acName1A05[] = "StepGenOut1";
|
||||
static const char acName1A05_00[] = "Max SubIndex";
|
||||
static const char acName1A05_01[] = "ActualPosition";
|
||||
static const char acName1A06[] = "StepGenOut2";
|
||||
static const char acName1A06_00[] = "Max SubIndex";
|
||||
static const char acName1A06_01[] = "ActualPosition";
|
||||
static const char acName1C00[] = "Sync Manager Communication Type";
|
||||
static const char acName1C00_00[] = "Max SubIndex";
|
||||
static const char acName1C00_01[] = "Communications Type SM0";
|
||||
@@ -62,9 +44,6 @@ static const char acName1C12[] = "Sync Manager 2 PDO Assignment";
|
||||
static const char acName1C12_00[] = "Max SubIndex";
|
||||
static const char acName1C12_01[] = "PDO Mapping";
|
||||
static const char acName1C12_02[] = "PDO Mapping";
|
||||
static const char acName1C12_03[] = "PDO Mapping";
|
||||
static const char acName1C12_04[] = "PDO Mapping";
|
||||
static const char acName1C12_05[] = "PDO Mapping";
|
||||
static const char acName1C13[] = "Sync Manager 3 PDO Assignment";
|
||||
static const char acName1C13_00[] = "Max SubIndex";
|
||||
static const char acName1C13_01[] = "PDO Mapping";
|
||||
@@ -72,34 +51,17 @@ static const char acName1C13_02[] = "PDO Mapping";
|
||||
static const char acName1C13_03[] = "PDO Mapping";
|
||||
static const char acName1C13_04[] = "PDO Mapping";
|
||||
static const char acName1C13_05[] = "PDO Mapping";
|
||||
static const char acName1C13_06[] = "PDO Mapping";
|
||||
static const char acName1C13_07[] = "PDO Mapping";
|
||||
static const char acName6000[] = "EncPos";
|
||||
static const char acName6001[] = "EncFrequency";
|
||||
static const char acName6002[] = "DiffT";
|
||||
static const char acName6003[] = "IndexByte";
|
||||
static const char acName6004[] = "IndexStatus";
|
||||
static const char acName6005[] = "StepGenOut1";
|
||||
static const char acName6005_00[] = "Max SubIndex";
|
||||
static const char acName6005_01[] = "ActualPosition";
|
||||
static const char acName6006[] = "StepGenOut2";
|
||||
static const char acName6006_00[] = "Max SubIndex";
|
||||
static const char acName6006_01[] = "ActualPosition";
|
||||
static const char acName7000[] = "EncPosScale";
|
||||
static const char acName7001[] = "IndexLatchEnable";
|
||||
static const char acName7002[] = "StepGenIn1";
|
||||
static const char acName7002_00[] = "Max SubIndex";
|
||||
static const char acName7002_01[] = "CommandedPosition";
|
||||
static const char acName7002_02[] = "StepsPerMM";
|
||||
static const char acName7003[] = "StepGenIn2";
|
||||
static const char acName7003_00[] = "Max SubIndex";
|
||||
static const char acName7003_01[] = "CommandedPosition";
|
||||
static const char acName7003_02[] = "StepsPerMM";
|
||||
static const char acName7004[] = "Enable1";
|
||||
|
||||
const _objd SDO1000[] =
|
||||
{
|
||||
{0x0, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1000, 5001, NULL},
|
||||
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1000, 5001, NULL},
|
||||
};
|
||||
const _objd SDO1008[] =
|
||||
{
|
||||
@@ -116,73 +78,45 @@ const _objd SDO100A[] =
|
||||
const _objd SDO1018[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1018_00, 4, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1018_01, 2730, NULL},
|
||||
{0x02, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1018_02, 12303564, NULL},
|
||||
{0x03, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1018_03, 2, NULL},
|
||||
{0x04, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1018_04, 1, &Obj.serial},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1018_01, 2730, NULL},
|
||||
{0x02, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1018_02, 12303564, NULL},
|
||||
{0x03, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1018_03, 2, NULL},
|
||||
{0x04, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1018_04, 1, &Obj.serial},
|
||||
};
|
||||
const _objd SDO1600[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1600_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1600_01, 0x70000020, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1600_01, 0x70000020, NULL},
|
||||
};
|
||||
const _objd SDO1601[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1601_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1601_01, 0x70010020, NULL},
|
||||
};
|
||||
const _objd SDO1602[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1602_00, 2, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1602_01, 0x70020140, NULL},
|
||||
{0x02, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1602_02, 0x70020210, NULL},
|
||||
};
|
||||
const _objd SDO1603[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1603_00, 2, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1603_01, 0x70030140, NULL},
|
||||
{0x02, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1603_02, 0x70030210, NULL},
|
||||
};
|
||||
const _objd SDO1604[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1604_00, 2, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1604_01, 0x70040001, NULL},
|
||||
{0x02, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1604_02, 0x00000007, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1601_01, 0x70010020, NULL},
|
||||
};
|
||||
const _objd SDO1A00[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A00_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A00_01, 0x60000040, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A00_01, 0x60000020, NULL},
|
||||
};
|
||||
const _objd SDO1A01[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A01_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A01_01, 0x60010040, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A01_01, 0x60010020, NULL},
|
||||
};
|
||||
const _objd SDO1A02[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A02_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A02_01, 0x60020020, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A02_01, 0x60020020, NULL},
|
||||
};
|
||||
const _objd SDO1A03[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A03_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A03_01, 0x60030020, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A03_01, 0x60030020, NULL},
|
||||
};
|
||||
const _objd SDO1A04[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A04_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A04_01, 0x60040020, NULL},
|
||||
};
|
||||
const _objd SDO1A05[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A05_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A05_01, 0x60050140, NULL},
|
||||
};
|
||||
const _objd SDO1A06[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1A06_00, 1, NULL},
|
||||
{0x01, DTYPE_UNSIGNED64, 64, ATYPE_RO, acName1A06_01, 0x60060140, NULL},
|
||||
{0x01, DTYPE_UNSIGNED32, 32, ATYPE_RO, acName1A04_01, 0x60040020, NULL},
|
||||
};
|
||||
const _objd SDO1C00[] =
|
||||
{
|
||||
@@ -194,31 +128,26 @@ const _objd SDO1C00[] =
|
||||
};
|
||||
const _objd SDO1C12[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C12_00, 5, NULL},
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C12_00, 2, NULL},
|
||||
{0x01, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_01, 0x1600, NULL},
|
||||
{0x02, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_02, 0x1601, NULL},
|
||||
{0x03, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_03, 0x1602, NULL},
|
||||
{0x04, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_04, 0x1603, NULL},
|
||||
{0x05, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C12_05, 0x1604, NULL},
|
||||
};
|
||||
const _objd SDO1C13[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C13_00, 7, NULL},
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName1C13_00, 5, NULL},
|
||||
{0x01, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_01, 0x1A00, NULL},
|
||||
{0x02, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_02, 0x1A01, NULL},
|
||||
{0x03, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_03, 0x1A02, NULL},
|
||||
{0x04, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_04, 0x1A03, NULL},
|
||||
{0x05, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_05, 0x1A04, NULL},
|
||||
{0x06, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_06, 0x1A05, NULL},
|
||||
{0x07, DTYPE_UNSIGNED16, 16, ATYPE_RO, acName1C13_07, 0x1A06, NULL},
|
||||
};
|
||||
const _objd SDO6000[] =
|
||||
{
|
||||
{0x0, DTYPE_REAL64, 64, ATYPE_RO | ATYPE_TXPDO, acName6000, 0, &Obj.EncPos},
|
||||
{0x0, DTYPE_REAL32, 32, ATYPE_RO | ATYPE_TXPDO, acName6000, 0x00000000, &Obj.EncPos},
|
||||
};
|
||||
const _objd SDO6001[] =
|
||||
{
|
||||
{0x0, DTYPE_REAL64, 64, ATYPE_RO | ATYPE_TXPDO, acName6001, 0, &Obj.EncFrequency},
|
||||
{0x0, DTYPE_REAL32, 32, ATYPE_RO | ATYPE_TXPDO, acName6001, 0x00000000, &Obj.EncFrequency},
|
||||
};
|
||||
const _objd SDO6002[] =
|
||||
{
|
||||
@@ -232,16 +161,6 @@ const _objd SDO6004[] =
|
||||
{
|
||||
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_TXPDO, acName6004, 0, &Obj.IndexStatus},
|
||||
};
|
||||
const _objd SDO6005[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName6005_00, 1, NULL},
|
||||
{0x01, DTYPE_REAL64, 64, ATYPE_RO, acName6005_01, 0, &Obj.StepGenOut1.ActualPosition},
|
||||
};
|
||||
const _objd SDO6006[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName6006_00, 1, NULL},
|
||||
{0x01, DTYPE_REAL64, 64, ATYPE_RO, acName6006_01, 0, &Obj.StepGenOut2.ActualPosition},
|
||||
};
|
||||
const _objd SDO7000[] =
|
||||
{
|
||||
{0x0, DTYPE_INTEGER32, 32, ATYPE_RO | ATYPE_RXPDO, acName7000, 0, &Obj.EncPosScale},
|
||||
@@ -250,22 +169,6 @@ const _objd SDO7001[] =
|
||||
{
|
||||
{0x0, DTYPE_UNSIGNED32, 32, ATYPE_RO | ATYPE_RXPDO, acName7001, 0, &Obj.IndexLatchEnable},
|
||||
};
|
||||
const _objd SDO7002[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName7002_00, 2, NULL},
|
||||
{0x01, DTYPE_REAL64, 64, ATYPE_RO, acName7002_01, 0, &Obj.StepGenIn1.CommandedPosition},
|
||||
{0x02, DTYPE_INTEGER16, 16, ATYPE_RO, acName7002_02, 0, &Obj.StepGenIn1.StepsPerMM},
|
||||
};
|
||||
const _objd SDO7003[] =
|
||||
{
|
||||
{0x00, DTYPE_UNSIGNED8, 8, ATYPE_RO, acName7003_00, 2, NULL},
|
||||
{0x01, DTYPE_REAL64, 64, ATYPE_RO, acName7003_01, 0, &Obj.StepGenIn2.CommandedPosition},
|
||||
{0x02, DTYPE_INTEGER16, 16, ATYPE_RO, acName7003_02, 0, &Obj.StepGenIn2.StepsPerMM},
|
||||
};
|
||||
const _objd SDO7004[] =
|
||||
{
|
||||
{0x0, DTYPE_BOOLEAN, 1, ATYPE_RO | ATYPE_RXPDO, acName7004, 0, &Obj.Enable1},
|
||||
};
|
||||
|
||||
const _objectlist SDOobjects[] =
|
||||
{
|
||||
@@ -276,30 +179,20 @@ const _objectlist SDOobjects[] =
|
||||
{0x1018, OTYPE_RECORD, 4, 0, acName1018, SDO1018},
|
||||
{0x1600, OTYPE_RECORD, 1, 0, acName1600, SDO1600},
|
||||
{0x1601, OTYPE_RECORD, 1, 0, acName1601, SDO1601},
|
||||
{0x1602, OTYPE_RECORD, 2, 0, acName1602, SDO1602},
|
||||
{0x1603, OTYPE_RECORD, 2, 0, acName1603, SDO1603},
|
||||
{0x1604, OTYPE_RECORD, 2, 0, acName1604, SDO1604},
|
||||
{0x1A00, OTYPE_RECORD, 1, 0, acName1A00, SDO1A00},
|
||||
{0x1A01, OTYPE_RECORD, 1, 0, acName1A01, SDO1A01},
|
||||
{0x1A02, OTYPE_RECORD, 1, 0, acName1A02, SDO1A02},
|
||||
{0x1A03, OTYPE_RECORD, 1, 0, acName1A03, SDO1A03},
|
||||
{0x1A04, OTYPE_RECORD, 1, 0, acName1A04, SDO1A04},
|
||||
{0x1A05, OTYPE_RECORD, 1, 0, acName1A05, SDO1A05},
|
||||
{0x1A06, OTYPE_RECORD, 1, 0, acName1A06, SDO1A06},
|
||||
{0x1C00, OTYPE_ARRAY, 4, 0, acName1C00, SDO1C00},
|
||||
{0x1C12, OTYPE_ARRAY, 5, 0, acName1C12, SDO1C12},
|
||||
{0x1C13, OTYPE_ARRAY, 7, 0, acName1C13, SDO1C13},
|
||||
{0x1C12, OTYPE_ARRAY, 2, 0, acName1C12, SDO1C12},
|
||||
{0x1C13, OTYPE_ARRAY, 5, 0, acName1C13, SDO1C13},
|
||||
{0x6000, OTYPE_VAR, 0, 0, acName6000, SDO6000},
|
||||
{0x6001, OTYPE_VAR, 0, 0, acName6001, SDO6001},
|
||||
{0x6002, OTYPE_VAR, 0, 0, acName6002, SDO6002},
|
||||
{0x6003, OTYPE_VAR, 0, 0, acName6003, SDO6003},
|
||||
{0x6004, OTYPE_VAR, 0, 0, acName6004, SDO6004},
|
||||
{0x6005, OTYPE_RECORD, 1, 0, acName6005, SDO6005},
|
||||
{0x6006, OTYPE_RECORD, 1, 0, acName6006, SDO6006},
|
||||
{0x7000, OTYPE_VAR, 0, 0, acName7000, SDO7000},
|
||||
{0x7001, OTYPE_VAR, 0, 0, acName7001, SDO7001},
|
||||
{0x7002, OTYPE_RECORD, 2, 0, acName7002, SDO7002},
|
||||
{0x7003, OTYPE_RECORD, 2, 0, acName7003, SDO7003},
|
||||
{0x7004, OTYPE_VAR, 0, 0, acName7004, SDO7004},
|
||||
{0xffff, 0xff, 0xff, 0xff, NULL, NULL}
|
||||
};
|
||||
@@ -13,35 +13,16 @@ typedef struct
|
||||
|
||||
/* Inputs */
|
||||
|
||||
double EncPos;
|
||||
double EncFrequency;
|
||||
float EncPos;
|
||||
float EncFrequency;
|
||||
uint32_t DiffT;
|
||||
uint32_t IndexByte;
|
||||
uint32_t IndexStatus;
|
||||
struct
|
||||
{
|
||||
double ActualPosition;
|
||||
} StepGenOut1;
|
||||
struct
|
||||
{
|
||||
double ActualPosition;
|
||||
} StepGenOut2;
|
||||
|
||||
/* Outputs */
|
||||
|
||||
int32_t EncPosScale;
|
||||
uint32_t IndexLatchEnable;
|
||||
struct
|
||||
{
|
||||
double CommandedPosition;
|
||||
int16_t StepsPerMM;
|
||||
} StepGenIn1;
|
||||
struct
|
||||
{
|
||||
double CommandedPosition;
|
||||
int16_t StepsPerMM;
|
||||
} StepGenIn2;
|
||||
uint8_t Enable1;
|
||||
|
||||
} _Objects;
|
||||
|
||||
File renamed without changes.
Executable
+270
@@ -0,0 +1,270 @@
|
||||
#include <Arduino.h>
|
||||
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.c
|
||||
* @brief : Main program body
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "Stepper.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
/* USER CODE END PTD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
TIM_HandleTypeDef htim1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void SystemClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_TIM1_Init(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if (htim->Instance == TIM1)
|
||||
{
|
||||
//__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PE9 ------> TIM1_CH1
|
||||
PA8 ------< TIM1_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8; // 9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
// HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief The application entry point.
|
||||
* @retval int
|
||||
*/
|
||||
void StepperSetup(void)
|
||||
{
|
||||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||
// HAL_Init();
|
||||
// SystemClock_Config();
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
// MX_GPIO_Init();
|
||||
MX_TIM1_Init();
|
||||
|
||||
// htim1.Instance->ARR = 1;
|
||||
// htim1.Instance->CCR1 = 1;
|
||||
HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
|
||||
TIM_TypeDef *TIMM = TIM1;
|
||||
|
||||
#define CLOCK_FREQ (168000000-2000000)
|
||||
// Best range on timer clock frequency/pulse length/65355 +1 => best resolution in the pulse range
|
||||
TIM1->PSC = CLOCK_FREQ / 1000 / (1 << 16);
|
||||
|
||||
/* Infinite loop */
|
||||
#if 0
|
||||
while (1)
|
||||
{
|
||||
makePulses(1200, 15);
|
||||
HAL_Delay(1000);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void makePulses(uint32_t totalLength /* µsec */, uint32_t nPulses)
|
||||
{
|
||||
uint64_t TickFreq = CLOCK_FREQ / (TIM1->PSC+1); // 56 MHz at PSC=2
|
||||
uint64_t TicksTotal = TickFreq * totalLength / 1000000; // Total number of ticks during this time, ca 56000
|
||||
uint32_t TicksPerPulse = TicksTotal / nPulses;
|
||||
|
||||
TIM1->ARR = TicksPerPulse - 1;
|
||||
TIM1->CCR1 = TicksPerPulse / 2;
|
||||
TIM1->RCR = nPulses - 1;
|
||||
TIM1->EGR = TIM_EGR_UG;
|
||||
TIM1->CR1 |= TIM_CR1_OPM;
|
||||
TIM1->CR1 |= TIM_CR1_CEN;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLN = 168;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_TIM1_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM1_Init 0 */
|
||||
|
||||
/* USER CODE END TIM1_Init 0 */
|
||||
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM1_Init 1 */
|
||||
|
||||
/* USER CODE END TIM1_Init 1 */
|
||||
htim1.Instance = TIM1;
|
||||
htim1.Init.Prescaler = 70;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.Period = 65535;
|
||||
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim1.Init.RepetitionCounter = 10;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
|
||||
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM2;
|
||||
sConfigOC.Pulse = 0;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM1_Init 2 */
|
||||
|
||||
/* USER CODE END TIM1_Init 2 */
|
||||
HAL_TIM_MspPostInit(&htim1);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief GPIO Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_GPIO_Init(void)
|
||||
{
|
||||
/* USER CODE BEGIN MX_GPIO_Init_1 */
|
||||
/* USER CODE END MX_GPIO_Init_1 */
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
|
||||
/* USER CODE BEGIN MX_GPIO_Init_2 */
|
||||
/* USER CODE END MX_GPIO_Init_2 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
||||
/* USER CODE END 4 */
|
||||
@@ -5,21 +5,45 @@
|
||||
Created on: Nov 20, 2020
|
||||
Author: GoktugH.
|
||||
*/
|
||||
// TIM2, TIM3, TIM4, TIM8
|
||||
|
||||
Encoder::Encoder()
|
||||
{
|
||||
int unit;
|
||||
}
|
||||
|
||||
// void Encoder::SetCount(enum EncTimer enc, int64_t Counter)
|
||||
void Encoder::SetCount(int64_t Counter)
|
||||
void Encoder::eattach(int enco)
|
||||
{
|
||||
tim_base->CNT = Counter;
|
||||
}
|
||||
// uint16_t Encoder::GetCount(enum EncTimer enc)
|
||||
uint16_t Encoder::GetCount()
|
||||
|
||||
void Encoder::attachh(int encoNumber)
|
||||
{
|
||||
return tim_base->CNT;
|
||||
eattach(encoNumber);
|
||||
}
|
||||
|
||||
void Encoder::SetCount(enum EncTimer enc, int64_t Counter)
|
||||
{
|
||||
|
||||
if (enc == Tim2)
|
||||
TIM2->CNT = Counter;
|
||||
else if (enc == Tim3)
|
||||
TIM3->CNT = Counter;
|
||||
else if (enc == Tim4)
|
||||
TIM4->CNT = Counter;
|
||||
else if (enc == Tim8)
|
||||
TIM8->CNT = Counter;
|
||||
}
|
||||
uint16_t Encoder::GetCount(enum EncTimer enc)
|
||||
{
|
||||
|
||||
if (enc == Tim2)
|
||||
c = (TIM2->CNT);
|
||||
else if (enc == Tim3)
|
||||
c = (TIM3->CNT);
|
||||
else if (enc == Tim4)
|
||||
c = (TIM4->CNT);
|
||||
else if (enc == Tim8)
|
||||
c = (TIM8->CNT);
|
||||
return c;
|
||||
}
|
||||
|
||||
void GpioConfigPortA(GPIO_TypeDef *GPIOx)
|
||||
@@ -271,27 +295,27 @@ void rcc_config()
|
||||
RCC->AHB1ENR |= 0x10; // GPIOE
|
||||
|
||||
RCC->APB1ENR |= 0x20000000; // ENABLE DAC
|
||||
// RCC->APB2ENR |= 0x00000002; // APB2 TIM8
|
||||
RCC->APB2ENR |= 0x00000002; // APB2 TIM8
|
||||
RCC->APB1ENR |= 0x00000004; // APB1 TIM4
|
||||
RCC->APB1ENR |= 0x00000001; // APB1 TIM2
|
||||
// RCC->APB1ENR |= 0x00000002; // APB1 TIM3
|
||||
RCC->APB1ENR |= 0x00000002; // APB1 TIM3
|
||||
|
||||
GpioConfigPortA(GPIOA);
|
||||
// GpioConfigPortC(GPIOC);
|
||||
GpioConfigPortC(GPIOC);
|
||||
GpioConfigPortD(GPIOD);
|
||||
#if 0 // Skipping since TIM8 is step generator and TIM3, chan4 is smae as TIM8, chan4
|
||||
|
||||
GPIO_PinAF(GPIOA, GPIO_PinSource6, GPIO_AF_TIM3);
|
||||
GPIO_PinAF(GPIOA, GPIO_PinSource7, GPIO_AF_TIM3);
|
||||
|
||||
GPIO_PinAF(GPIOC, GPIO_PinSource6, GPIO_AF_TIM8);
|
||||
GPIO_PinAF(GPIOC, GPIO_PinSource7, GPIO_AF_TIM8);
|
||||
#endif
|
||||
|
||||
GPIO_PinAF(GPIOD, GPIO_PinSource12, GPIO_AF_TIM4);
|
||||
GPIO_PinAF(GPIOD, GPIO_PinSource13, GPIO_AF_TIM4);
|
||||
|
||||
GPIO_PinAF(GPIOA, GPIO_PinSource0, GPIO_AF_TIM2);
|
||||
GPIO_PinAF(GPIOA, GPIO_PinSource1, GPIO_AF_TIM2);
|
||||
#if 0 // Skipping since I use TIM8 as stepper generator
|
||||
|
||||
TIM_EncoderInterConfig(TIM8, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
||||
TIMER_InitStructure.TIM_Period = 65535;
|
||||
TIMER_InitStructure.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
||||
@@ -299,7 +323,7 @@ void rcc_config()
|
||||
TIM_TimeBaseStructInit(&TIMER_InitStructure);
|
||||
TIM_Cmd(TIM8, ENABLE);
|
||||
TIM8->CNT = 0;
|
||||
#endif
|
||||
|
||||
TIM_EncoderInterConfig(TIM4, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
||||
TIMER_InitStructureE.TIM_Period = 65535;
|
||||
TIMER_InitStructureE.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
||||
@@ -316,7 +340,7 @@ void rcc_config()
|
||||
TIM_Cmd(TIM2, ENABLE);
|
||||
|
||||
TIM2->CNT = 0;
|
||||
#if 0
|
||||
|
||||
TIM_EncoderInterConfig(TIM3, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Falling);
|
||||
TIMER_InitStructureEEG.TIM_Period = 65535;
|
||||
TIMER_InitStructureEEG.TIM_CounterMode = TIM_CounterMode_Up | TIM_CounterMode_Down;
|
||||
@@ -325,5 +349,4 @@ void rcc_config()
|
||||
TIM_Cmd(TIM3, ENABLE);
|
||||
|
||||
TIM3->CNT = 0;
|
||||
#endif
|
||||
}
|
||||
Executable
+154
@@ -0,0 +1,154 @@
|
||||
#include <Arduino.h>
|
||||
|
||||
#include <stdio.h>
|
||||
extern "C"
|
||||
{
|
||||
#include "ecat_slv.h"
|
||||
#include "utypes.h"
|
||||
};
|
||||
#include <CircularBuffer.h>
|
||||
#define RINGBUFFERLEN 101
|
||||
CircularBuffer<double_t, RINGBUFFERLEN> Pos;
|
||||
CircularBuffer<uint32_t, RINGBUFFERLEN> TDelta;
|
||||
|
||||
int64_t PreviousEncoderCounterValue = 0;
|
||||
int64_t unwrap_encoder(uint16_t in, int64_t *prev);
|
||||
#include <Stm32F4_Encoder.h>
|
||||
Encoder EncoderInit;
|
||||
Encoder *encP = &EncoderInit;
|
||||
|
||||
// #include "Stepper.h"
|
||||
#define INDEX_PIN PA2
|
||||
HardwareSerial Serial1(PA10, PA9);
|
||||
_Objects Obj;
|
||||
|
||||
void indexPulse(void);
|
||||
double PosScaleRes = 1.0;
|
||||
uint32_t CurPosScale = 1;
|
||||
uint8_t OldLatchCEnable = 0;
|
||||
volatile uint8_t indexPulseFired = 0;
|
||||
uint32_t nFires = 0;
|
||||
volatile uint8_t pleaseZeroTheCounter = 0;
|
||||
uint32_t PrevTime = 0, Prev2Time = 0;
|
||||
|
||||
void cb_set_outputs(void) // Master outputs gets here, slave inputs, first operation
|
||||
{
|
||||
if (Obj.IndexLatchEnable && !OldLatchCEnable) // Should only happen first time IndexCEnable is set
|
||||
{
|
||||
pleaseZeroTheCounter = 1;
|
||||
}
|
||||
OldLatchCEnable = Obj.IndexLatchEnable;
|
||||
|
||||
if (CurPosScale != Obj.EncPosScale && Obj.EncPosScale != 0)
|
||||
{
|
||||
CurPosScale = Obj.EncPosScale;
|
||||
PosScaleRes = 1.0 / double(CurPosScale);
|
||||
}
|
||||
}
|
||||
|
||||
void cb_get_inputs(void) // Set Master inputs, slave outputs, last operation
|
||||
{
|
||||
Obj.IndexStatus = 0;
|
||||
if (indexPulseFired)
|
||||
{
|
||||
Obj.IndexStatus = 1;
|
||||
indexPulseFired = 0;
|
||||
nFires++;
|
||||
PreviousEncoderCounterValue = 0;
|
||||
}
|
||||
uint64_t now = micros(); // Exploring the cycle times
|
||||
Obj.DiffT = now - Prev2Time;
|
||||
Prev2Time = PrevTime;
|
||||
PrevTime = now;
|
||||
|
||||
int64_t pos = unwrap_encoder(TIM2->CNT, &PreviousEncoderCounterValue);
|
||||
double CurPos = pos * PosScaleRes;
|
||||
Obj.EncPos = CurPos;
|
||||
|
||||
double diffT = 0;
|
||||
double diffPos = 0;
|
||||
TDelta.push(ESCvar.Time); // Running average over the length of the circular buffer
|
||||
Pos.push(CurPos);
|
||||
if (Pos.size() >= 2)
|
||||
{
|
||||
diffT = 1.0e-9 * (TDelta.last() - TDelta.first()); // Time is in nanoseconds
|
||||
diffPos = fabs(Pos.last() - Pos.first());
|
||||
}
|
||||
Obj.EncFrequency = diffT != 0 ? diffPos / diffT : 0.0; // Revolutions per second
|
||||
|
||||
Obj.IndexByte = digitalRead(INDEX_PIN);
|
||||
if (Obj.IndexByte)
|
||||
Serial1.printf("IS 1\n");
|
||||
}
|
||||
|
||||
static esc_cfg_t config =
|
||||
{
|
||||
.user_arg = NULL,
|
||||
.use_interrupt = 0,
|
||||
.watchdog_cnt = 150,
|
||||
.set_defaults_hook = NULL,
|
||||
.pre_state_change_hook = NULL,
|
||||
.post_state_change_hook = NULL,
|
||||
.application_hook = NULL, // StepGen,
|
||||
.safeoutput_override = NULL,
|
||||
.pre_object_download_hook = NULL,
|
||||
.post_object_download_hook = NULL,
|
||||
.rxpdo_override = NULL,
|
||||
.txpdo_override = NULL,
|
||||
.esc_hw_interrupt_enable = NULL,
|
||||
.esc_hw_interrupt_disable = NULL,
|
||||
.esc_hw_eep_handler = NULL,
|
||||
.esc_check_dc_handler = NULL,
|
||||
};
|
||||
|
||||
void setup(void)
|
||||
{
|
||||
Serial1.begin(115200);
|
||||
rcc_config();
|
||||
|
||||
// Set starting count value
|
||||
EncoderInit.SetCount(Tim2, 0);
|
||||
// EncoderInit.SetCount(Tim3, 0);
|
||||
// EncoderInit.SetCount(Tim4, 0);
|
||||
// EncoderInit.SetCount(Tim8, 0);
|
||||
|
||||
ecat_slv_init(&config);
|
||||
attachInterrupt(digitalPinToInterrupt(INDEX_PIN), indexPulse, RISING); // Always when Index triggered
|
||||
}
|
||||
|
||||
void loop(void)
|
||||
{
|
||||
ESCvar.PrevTime = ESCvar.Time;
|
||||
ecat_slv();
|
||||
}
|
||||
|
||||
#define ONE_PERIOD 65536
|
||||
#define HALF_PERIOD 32768
|
||||
|
||||
int64_t unwrap_encoder(uint16_t in, int64_t *prev)
|
||||
{
|
||||
int64_t c64 = (int32_t)in - HALF_PERIOD; // remove half period to determine (+/-) sign of the wrap
|
||||
int64_t dif = (c64 - *prev); // core concept: prev + (current - prev) = current
|
||||
|
||||
// wrap difference from -HALF_PERIOD to HALF_PERIOD. modulo prevents differences after the wrap from having an incorrect result
|
||||
int64_t mod_dif = ((dif + HALF_PERIOD) % ONE_PERIOD) - HALF_PERIOD;
|
||||
if (dif < -HALF_PERIOD)
|
||||
mod_dif += ONE_PERIOD; // account for mod of negative number behavior in C
|
||||
|
||||
int64_t unwrapped = *prev + mod_dif;
|
||||
*prev = unwrapped; // load previous value
|
||||
|
||||
return unwrapped + HALF_PERIOD; // remove the shift we applied at the beginning, and return
|
||||
}
|
||||
|
||||
void indexPulse(void)
|
||||
{
|
||||
if (pleaseZeroTheCounter)
|
||||
{
|
||||
TIM2->CNT = 0;
|
||||
indexPulseFired = 1;
|
||||
Pos.clear();
|
||||
TDelta.clear();
|
||||
pleaseZeroTheCounter = 0;
|
||||
}
|
||||
}
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
+1
-1
@@ -64,7 +64,7 @@
|
||||
39,
|
||||
40
|
||||
],
|
||||
"visible_layers": "002202b_80000005",
|
||||
"visible_layers": "002202a_00000001",
|
||||
"zone_display_mode": 0
|
||||
},
|
||||
"meta": {
|
||||
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
Loaded 100 of 230 files, more files were not shown because too many files have changed in this diff.
Show more
Reference in new issue
Block a user