Submitting design for fabrication

This commit is contained in:
Hakan Bastedt
2024-12-14 11:47:00 +01:00
parent 7ebc28a5ca
commit 909685cf0e
15 changed files with 130459 additions and 6 deletions

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@@ -1,3 +1,50 @@
AX58100-stm32-ethercat-backups
.~lock*
fp-info-cache
Ethercat-stm32-backup*
*.lck
\#auto_saved_file*
gerbers/
Ax58100-stm32-ethercat-backups/
freerouting.*
*.dsn
*.frb
*.rules
*.ses
Ax58100-stm32-ethercat.csv
Ax58100-stm32-ethercat.ods
# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
~*.lck
\#auto_saved_files#
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
# Gerber outputs
Gerbers\*
*.zip

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@@ -1,5 +1,50 @@
AX58100-stm32-ethercat-backups
.~lock*
fp-info-cache
Ethercat-stm32-backup*
*.lck
Gerbers/
Gerbers/*
\#auto_saved_file*
gerbers/
Ax58100-stm32-ethercat-backups/
freerouting.*
*.dsn
*.frb
*.rules
*.ses
Ax58100-stm32-ethercat.csv
Ax58100-stm32-ethercat.ods
# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
~*.lck
\#auto_saved_files#
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
# Gerber outputs
Gerbers\*
*.zip

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@@ -0,0 +1,50 @@
AX58100-stm32-ethercat-backups
.~lock*
fp-info-cache
\#auto_saved_file*
gerbers/
Ax58100-stm32-ethercat-backups/
freerouting.*
*.dsn
*.frb
*.rules
*.ses
Ax58100-stm32-ethercat.csv
Ax58100-stm32-ethercat.ods
# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
~*.lck
\#auto_saved_files#
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
# Gerber outputs
Gerbers\*
*.zip

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(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "LAN9252_PT" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
(property "Reference" "U" (at -60.96 59.69 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
)
(property "Value" "LAN9252_PT" (at -29.21 -60.96 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
)
(property "Footprint" "LAN9252_PT:QFP50P1200X1200X120-65N" (at -5.08 6.35 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Datasheet" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "MF" "Microchip" (at -1.27 -13.97 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "MAXIMUM_PACKAGE_HEIGHT" "1.2 mm" (at 0 -2.54 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Package" "TQFP-64 Microchip" (at -1.27 -11.43 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Price" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Check_prices" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "STANDARD" "IPC 7351B" (at -1.27 -5.08 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "PARTREV" "04-08-15" (at -1.27 -13.97 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "SnapEDA_Link" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "MP" "LAN9252/PT" (at -2.54 3.81 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Purchase-URL" "" (at 0 0 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Description" "\nEthernet Controller 10/100 Base-FX/T/TX PHY SPI Interface 64-TQFP-EP (10x10)\n" (at -1.27 10.16 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "Availability" "" (at 0 -2.54 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(property "MANUFACTURER" "Microchip Technology" (at -1.27 -8.89 0)
(effects (font (size 1.27 1.27)) (justify bottom) hide)
)
(symbol "LAN9252_PT_0_0"
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(fill (type background))
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{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
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"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.1,
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"dimension_precision": 4,
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"dimensions": {
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"units_format": 1
},
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"other_text_upright": false,
"pads": {
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"height": 3.5,
"width": 3.5
},
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"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
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}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
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